[U-Boot] DBCR0 reset problem in MPC8548CDS

[Werner Nedel <wmnedel@gmail.com>]

Hi,

I'm trying to update my u-boot version (1.2) to the last one (2009.03). My
board is very similar to MPC8548CDS. Everything was working fine till I
tried to use the reset command. It hangs the processor in cpu_init_early_f,
when it realocates ccsbar. I'd always used the hard reset in DBCR0 register
instead HRESET_REQ that ins't wired in my board.

I saw that the value of MSR register came different before reset when I
compare with the old u-boot (0x8000 -> 0x29200). There are new writes in
this register in this new version, could any of them causing my problem?

The major difference beetwen my configuration and default resides in
u-boot.lds. I changed ADDR(.text) by the fisical init address of my boot
flash, that is different of my TEXT_BASE, but bootpg and resetvec still in
the same address, so I think that it couldn't be the problem.

u-boot.lds:
>  .bootpg 0xfff80000 + 0x7f000 :
<  .bootpg ADDR(.text) + 0x7f000 :
  {
    cpu/mpc85xx/start.o    (.bootpg)
  } :text = 0xffff

>  .resetvec 0xfff80000 + 0x7fffc :
<  .resetvec ADDR(.text) + 0x7fffc :
  {
    *(.resetvec)
  } :text = 0xffff

>  . = 0xfff80000 + 0x80000;
<  . = ADDR(.text) + 0x80000;

Thanks in advance,
Werner Nedel.