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29 Jul 2026 11:14:29 +0200 Received: from MUCSE815.infineon.com (172.23.29.41) by MUCSE812.infineon.com (172.23.29.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Wed, 29 Jul 2026 11:14:28 +0200 Received: from MUCSE815.infineon.com ([fe80::ed10:a720:3031:ca14]) by MUCSE815.infineon.com ([fe80::ed10:a720:3031:ca14%12]) with mapi id 15.02.2562.045; Wed, 29 Jul 2026 11:14:28 +0200 From: To: , CC: , , , , , , , , , , , Subject: RE: [PATCH v8 1/7] mtd: spi-nor-ids: Correct flash flags for ESMT/EON flashes Thread-Topic: [PATCH v8 1/7] mtd: spi-nor-ids: Correct flash flags for ESMT/EON flashes Thread-Index: AQHdHZ5JFSSXboGaZUaKKvE96Do3u7aEOIVg Date: Wed, 29 Jul 2026 09:14:28 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.161.6.196] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 29 Jul 2026 12:29:00 +0000 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=infineon.com; i=@infineon.com; q=dns/txt; s=IFXMAIL; t=1785316472; x=1816852472; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=3gFybt7c1XdVw1axl4zi54qbWzEhUidiBkkUoPfzMH4=; b=fS2kMzJ6+tnDM5GGqUSsenYwEzw9cgSCtrLAkJkRb7/hEM0huxvbxSCj IvZyPzgWA+ybCExkmhBQ2Z27MLvfQFu2vM861UqYPDgsCI9ujGOvmJ7LW 32r1TJxEpTF/06AMCWWeLkiCblqLJpIO1mVxEc5gR6qzVlueNfj728XW8 k=; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dmarc=pass (p=quarantine dis=none) header.from=infineon.com X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (1024-bit key, unprotected) header.d=infineon.com header.i=@infineon.com header.a=rsa-sha256 header.s=IFXMAIL header.b=fS2kMzJ6 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Sender: "U-Boot" Hi Weijie, > All currently supported ESMT/EON flashes supports 4KB sector and dual rea= d. > EN25Q80B also supports 1-1-4 quad read. This is inconsistent with...=20 >=20 > Link: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25Q80B.pdf > Link: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25QH128A%20(2T= C).pdf > Link: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25S64A(2SC).pd= f > Signed-off-by: Weijie Gao > --- > v8: not changed > v7: removed SPI_NOR_QUAD_READ from en25q80b > v6: removed SPI_NOR_QUAD_READ from incompatible flashes > v5: not changed > v3-v4: updated commit message > v2: not changed > --- > drivers/mtd/spi/spi-nor-ids.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) >=20 > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.= c > index c0fa98424aa..cf51f0ffa0b 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -90,12 +90,12 @@ const struct flash_info spi_nor_ids[] =3D { > #endif > #ifdef CONFIG_SPI_FLASH_EON /* EON */ > /* EON -- en25xxx */ > - { INFO("en25q80b", 0x1c3014, 0, 64 * 1024, 16, SECT_4K) }, > - { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, 0) }, > - { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, > - { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, 0) }, > - { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, 0) }, > - { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, > + { INFO("en25q80b", 0x1c3014, 0, 64 * 1024, 16, SECT_4K | SPI_= NOR_DUAL_READ) }, this. Please update commit description. With that fix, Reviewed-by: Takahiro Kuwano > + { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, SECT_4K | SPI_= NOR_DUAL_READ) }, > + { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K | SPI_= NOR_DUAL_READ) }, > + { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, SECT_4K | SPI_= NOR_DUAL_READ) }, > + { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, SECT_4K | SPI_= NOR_DUAL_READ) }, > + { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K | SPI_= NOR_DUAL_READ) }, > #endif > #ifdef CONFIG_SPI_FRAM_FUJITSU > /* Fujitsu MB85RS256TY */ > -- > 2.45.2