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Hope I have clarified your queries. Best Regards Gokul Praveen On 19/08/26 15:49, Gokul Praveen wrote: > A-Core no-SPL Mode is a boot approach that bypasses > the A Core SPL while retaining U-Boot in the boot flow. > This mode provides faster boot times compared to normal boot > while maintaining U-Boot's flexibility for kernel loading > and system configuration.. > > v3<==> v2 > =========== > * Updated the naming convention used from "no-spl" to "A-core no-spl" to > * make it more specific and clear.. > * Link to v2:https://lore.kernel.org/all/20260818115322.101705-1-g-praveen@ti.com/ > > v2<==> v1 > =========== > * Updated the naming convention used from "semi-falcon" to "no-spl". > * Link to v1: https://lore.kernel.org/all/20260814102153.44487-1-g-praveen@ti.com/ > > Boot logs link : > https://gist.github.com/GokulPraveen2001/fef407a482e2dad30272006de557627c > > Gokul Praveen (3): > configs: add A-core no-SPL mode fragment for k3 devices > arm: k3-binman: add tinospl.bin for direct U-Boot boot > doc: ti: document A Core no-SPL boot mode for J784S4 EVM > > Makefile | 2 +- > arch/arm/dts/k3-binman.dtsi | 47 ++++++++ > arch/arm/dts/k3-j784s4-binman.dtsi | 65 +++++++++++ > arch/arm/dts/k3-j784s4-evm-u-boot.dtsi | 14 +++ > configs/k3_a72_nospl.config | 1 + > configs/k3_r5_nospl.config | 1 + > doc/board/ti/j784s4_evm.rst | 143 +++++++++++++++++++++++++ > 7 files changed, 272 insertions(+), 1 deletion(-) > create mode 100644 configs/k3_a72_nospl.config > create mode 100644 configs/k3_r5_nospl.config >