From: Jan Beulich <jbeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Roger Pau Monné" <roger.pau@citrix.com>,
"Teddy Astie" <teddy.astie@vates.tech>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v2 1/3] x86: record SSP at non-guest entry points
Date: Thu, 9 Apr 2026 14:44:46 +0200 [thread overview]
Message-ID: <d24e943d-1e2a-47ba-85b8-a2f9f9523ed7@suse.com> (raw)
In-Reply-To: <5d3472ff-77ff-466d-9461-3b33ef0815aa@citrix.com>
On 09.04.2026 13:22, Andrew Cooper wrote:
> On 09/04/2026 9:13 am, Jan Beulich wrote:
>> On 08.04.2026 18:58, Andrew Cooper wrote:
>>> It would be an rdssp;push on
>>> one side, and a pop into any register on the other side. Furthermore,
>>> given that the ssp= doesn't exclude storing it for some user frames,
>>> just store it for all. It's one push/pop into a hot cacheline, and
>>> makes a substantial reduction in complexity.
>> I'm having significant reservations against that. I use the 0 put there
>> in subsequent patches, to identify absence of that data being available.
>
> Well, that's not safe then.
>
> You've already got non-zero values there on entry-from-PV because
> there's no CPL check gating RDSPP the common IDT paths.
In that case we get safe values (as read from the MSR during the privilege
level switch). And wait - no, the latter two patches don't make any such
assumptions, I don't think. I may have mis-remembered, or I may have
remembered how things were at a very early stage. So really the concern is
with RDSSPQ's resource use. This could in principle be as cheap as MOV,
but how do I know? (The latency/throughput data I can find doesn't include
this insn.) Plus for the purely PV entrypoints I don't see why we would
want/need the slightly larger code size that would result.
Jan
next prev parent reply other threads:[~2026-04-09 12:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 12:20 [PATCH v2 0/3] x86: CET-SS related adjustments Jan Beulich
2026-04-08 12:22 ` [PATCH v2 1/3] x86: record SSP at non-guest entry points Jan Beulich
2026-04-08 16:58 ` Andrew Cooper
2026-04-09 8:13 ` Jan Beulich
2026-04-09 11:22 ` Andrew Cooper
2026-04-09 12:44 ` Jan Beulich [this message]
2026-04-08 12:23 ` [PATCH v2 2/3] x86/traps: use entry_ssp in fixup_exception_return() Jan Beulich
2026-04-08 17:34 ` Andrew Cooper
2026-04-08 12:23 ` [PATCH v2 3/3] x86: prefer shadow stack for producing call traces Jan Beulich
2026-04-08 17:53 ` Andrew Cooper
2026-04-09 8:42 ` Jan Beulich
2026-04-09 10:41 ` Jan Beulich
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