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[79.154.229.240]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48feea5d4e4sm8447140f8f.57.2026.11.05.00.54.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 00:54:32 -0800 (PST) Message-ID: Subject: Re: [PATCH v3 02/15] drm/amdgpu: complete the guilty fence at the end of a multi ring reset From: Timur =?ISO-8859-1?Q?Krist=F3f?= To: "Zhang, Jesse(Jie)" , "amd-gfx@lists.freedesktop.org" Cc: "Deucher, Alexander" , "Koenig, Christian" , "Lazar, Lijo" , Mario Sopena-Novales , "Rastogi, Manu" , "Zhu, Jiongyu (Joey)" Date: Thu, 05 Nov 2026 09:54:31 +0100 In-Reply-To: References: <20261028085736.3808569-1-Jesse.Zhang@amd.com> <20261028085736.3808569-2-Jesse.Zhang@amd.com> <837f5db76982c9d84f45bc5ecd04e0bd9de16a4d.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.60.2 (3.60.2-3.fc44) X-Archived-By: MIME-Version: 1.0 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "amd-gfx" X-Spam-Status: No, score=-2.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Thu, 2026-11-05 at 02:09 +0000, Zhang, Jesse(Jie) wrote: > AMD General >=20 > > -----Original Message----- > > From: Timur Krist=C3=B3f > > Sent: Thursday, November 5, 2026 6:47 AM > > To: Zhang, Jesse(Jie) ; amd- > > gfx@lists.freedesktop.org > > Cc: Deucher, Alexander ; Koenig, > > Christian > > ; Lazar, Lijo ; Mario > > Sopena-Novales ; Rastogi, Manu > > ; Zhu, Jiongyu (Joey) > > Subject: Re: [PATCH v3 02/15] drm/amdgpu: complete the guilty fence > > at the > > end of a multi ring reset > >=20 > > On Wed, 2026-11-04 at 02:46 +0000, Zhang, Jesse(Jie) wrote: > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 r = =3D amdgpu_ring_reset_helper_end(ring, ring =3D=3D > > > > > guilty_ring ? > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 guilty_fence : > > > > > ring->guilty_fence); > > > >=20 > > > > Can you help me understand what was wrong with the line before? > > > > I think guilty_fence =3D=3D ring->guilty_fence when ring =3D=3D > > > > guilty_ring > > > > no? > > >=20 > > > Usually yes, but not when the soft reset follows a failed ring > > > reset > > > of the same job. > > > =C2=A0amdgpu_ring_reset(ring, vmid, job->hw_fence) > > > =C2=A0=C2=A0 -> amdgpu_ring_reset_helper_begin(ring, F) > > > =C2=A0=C2=A0 -> amdgpu_ring_backup_unprocessed_commands(ring, F) > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 sets ring->guilty_fence =3D F. > > >=20 > > > So by the time the end helper runs, ring->guilty_fence no longer > > > equals the guilty fence: the begin helper cleared it. > >=20 > > I think I see the problem. > >=20 > > I re-read the queue reset code and the helpers. During a queue > > reset, it makes > > a backup and saves the guilty fence but if the queue reset fails, > > it doesn't > > restore the contents, and on a subsequent call it clears the guilty > > fence and the > > backed up contents. > >=20 > > Unfortunately I think this commit doesn't completely fix that > > because the reset > > begin helper will still clear the backed up contents on the second > > call (sets > > ring_backup_entries_to_copy =3D 0). > >=20 > > I think the correct fix would be to make sure we don't repeat the > > ring reset > > begin helper: > > https://gitlab.freedesktop.org/Venemo/linux/- > > /commit/86f2bf222caee0da267f9d9e12362513fe4f7f9e > > Please take a look and if you agree feel free to take that patch in > > your series. > Right, the second backup also drops the commands of the other jobs on > the > guilty ring, and skipping the begin helper is the better fix. With > it, > ring->guilty_fence also stays the guilty fence, so 02/15 isn't needed > anymore. >=20 > I think the condition in your patch is inverted though: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (guilty_fence && ring->guil= ty_fence =3D=3D guilty_fence) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 amdgpu_ring_reset_helper_begin(ring, > ring_guilty_fence); >=20 > calls the begin helper only for a ring that was already backed up > with > this guilty fence. The other rings, and the guilty ring of a soft > reset > without a failed ring reset before it, aren't backed up anymore. The > latter would even replay a stale backup. The guilty ring after a > failed > ring reset is the one ring that still goes through the begin helper. > I > think you meant: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* A failed ring reset of the = same job already backed it up. > */ > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (ring !=3D guilty_ring || r= ing->guilty_fence !=3D > guilty_fence) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 amdgpu_ring_reset_helper_begin(ring, > ring_guilty_fence); >=20 > If that's what you meant, I'll take your patch with that change in > place > of 02 in v4. >=20 Yes, thank you for the correction.