From: Marc Zyngier <maz@kernel.org>
To: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: virt: Relax arch timer version check during early boot
Date: Mon, 20 Jan 2020 12:14:04 +0100 [thread overview]
Message-ID: <d4b8bb91f95385682f20c9dc5c6f5e50@kernel.org> (raw)
In-Reply-To: <eb889279-87f2-d674-9299-169794c285eb@arm.com>
Hi Vladimir,
On 2020-01-20 11:46, Vladimir Murzin wrote:
> + Marc
> + kvmarm@lists.cs.columbia.edu
>
> On 1/15/20 2:16 PM, Vladimir Murzin wrote:
>> Updates to the Generic Timer architecture allow ID_PFR1.GenTimer to
>> have values other than 0 or 1. At the moment, Linux is quite strict in
>> the way it handles this field at early boot and will not configure
>> arch timer if it doesn't find the value 1.
>>
>> Since here use ubfx for arch timer version extraction (hyb-stub build
>> with -march=armv7-a, so it is safe)
>>
>> To help backports (even though the code was correct at the time of
>> writing)
>> Fixes: 8ec58be9f3ff ("ARM: virt: arch_timers: enable access to
>> physical timers")
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
I'm not opposed to such a change, but it'd be good to document what
other values
are expected here, as the current (Rev E_a) ARM ARM only mentions values
0 and 1.
Thanks,
M.
>> ---
>> arch/arm/kernel/hyp-stub.S | 7 +++----
>> 1 file changed, 3 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
>> index ae50203..6607fa8 100644
>> --- a/arch/arm/kernel/hyp-stub.S
>> +++ b/arch/arm/kernel/hyp-stub.S
>> @@ -146,10 +146,9 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
>> #if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
>> @ make CNTP_* and CNTPCT accessible from PL1
>> mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
>> - lsr r7, #16
>> - and r7, #0xf
>> - cmp r7, #1
>> - bne 1f
>> + ubfx r7, r7, #16, #4
>> + teq r7, #0
>> + beq 1f
>> mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL
>> orr r7, r7, #3 @ PL1PCEN | PL1PCTEN
>> mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL
>>
--
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: virt: Relax arch timer version check during early boot
Date: Mon, 20 Jan 2020 12:14:04 +0100 [thread overview]
Message-ID: <d4b8bb91f95385682f20c9dc5c6f5e50@kernel.org> (raw)
In-Reply-To: <eb889279-87f2-d674-9299-169794c285eb@arm.com>
Hi Vladimir,
On 2020-01-20 11:46, Vladimir Murzin wrote:
> + Marc
> + kvmarm@lists.cs.columbia.edu
>
> On 1/15/20 2:16 PM, Vladimir Murzin wrote:
>> Updates to the Generic Timer architecture allow ID_PFR1.GenTimer to
>> have values other than 0 or 1. At the moment, Linux is quite strict in
>> the way it handles this field at early boot and will not configure
>> arch timer if it doesn't find the value 1.
>>
>> Since here use ubfx for arch timer version extraction (hyb-stub build
>> with -march=armv7-a, so it is safe)
>>
>> To help backports (even though the code was correct at the time of
>> writing)
>> Fixes: 8ec58be9f3ff ("ARM: virt: arch_timers: enable access to
>> physical timers")
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
I'm not opposed to such a change, but it'd be good to document what
other values
are expected here, as the current (Rev E_a) ARM ARM only mentions values
0 and 1.
Thanks,
M.
>> ---
>> arch/arm/kernel/hyp-stub.S | 7 +++----
>> 1 file changed, 3 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
>> index ae50203..6607fa8 100644
>> --- a/arch/arm/kernel/hyp-stub.S
>> +++ b/arch/arm/kernel/hyp-stub.S
>> @@ -146,10 +146,9 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
>> #if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
>> @ make CNTP_* and CNTPCT accessible from PL1
>> mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
>> - lsr r7, #16
>> - and r7, #0xf
>> - cmp r7, #1
>> - bne 1f
>> + ubfx r7, r7, #16, #4
>> + teq r7, #0
>> + beq 1f
>> mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL
>> orr r7, r7, #3 @ PL1PCEN | PL1PCTEN
>> mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL
>>
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-20 11:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-15 14:16 [PATCH] ARM: virt: Relax arch timer version check during early boot Vladimir Murzin
2020-01-15 14:16 ` Vladimir Murzin
2020-01-20 10:46 ` Vladimir Murzin
2020-01-20 10:46 ` Vladimir Murzin
2020-01-20 11:14 ` Marc Zyngier [this message]
2020-01-20 11:14 ` Marc Zyngier
2020-01-20 11:34 ` Vladimir Murzin
2020-01-20 11:34 ` Vladimir Murzin
2020-01-20 11:56 ` Marc Zyngier
2020-01-20 11:56 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d4b8bb91f95385682f20c9dc5c6f5e50@kernel.org \
--to=maz@kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=vladimir.murzin@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.