From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Christian_K=c3=b6nig?= Subject: Re: [PATCH] drm/amdgpu: guard ib scheduling while in reset Date: Thu, 24 Oct 2019 18:30:05 +0200 Message-ID: References: <1571914692-9430-1-git-send-email-shirish.s@amd.com> <23ea615d-5ef4-d0b3-a0ec-6fae67b102f2@gmail.com> Reply-To: christian.koenig-5C7GfCeVMHo@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1920156788==" Return-path: In-Reply-To: Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: "Grodzovsky, Andrey" , "Koenig, Christian" , "S, Shirish" , "Deucher, Alexander" Cc: "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" This is a multi-part message in MIME format. --===============1920156788== Content-Type: multipart/alternative; boundary="------------622BFDAF81EADBEC8F7B1A70" Content-Language: en-US This is a multi-part message in MIME format. --------------622BFDAF81EADBEC8F7B1A70 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Am 24.10.19 um 17:06 schrieb Grodzovsky, Andrey: > > > On 10/24/19 7:01 AM, Christian König wrote: >> Am 24.10.19 um 12:58 schrieb S, Shirish: >>> [Why] >>> Upon GPU reset, kernel cleans up already submitted jobs >>> via drm_sched_cleanup_jobs. >>> This schedules ib's via drm_sched_main()->run_job, leading to >>> race condition of rings being ready or not, since during reset >>> rings may be suspended. >> >> NAK, exactly that's what should not happen. >> >> The scheduler should be suspend while a GPU reset is in progress. >> >> So you are running into a completely different race here. >> >> Please sync up with Andrey how this was able to happen. >> >> Regards, >> Christian. > > > Shirish - Christian makes a good point - note that in > amdgpu_device_gpu_recover drm_sched_stop which stop all the scheduler > threads is called way before we suspend the HW in > amdgpu_device_pre_asic_reset->amdgpu_device_ip_suspend where SDMA > suspension is happening and where the HW ring marked as not ready - > please provide call stack for when you hit [drm:amdgpu_job_run] > *ERROR* Error scheduling IBs (-22) to identify the code path which > tried to submit the SDMA IB > Well the most likely cause of this is that the hardware failed to resume after the reset. Christian. > Andrey > > >> >>> >>> [How] >>> make GPU reset's amdgpu_device_ip_resume_phase2() & >>> amdgpu_ib_schedule() in amdgpu_job_run() mutually exclusive. >>> >>> Signed-off-by: Shirish S >>> --- >>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 + >>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ >>>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c    | 2 ++ >>>   3 files changed, 6 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> index f4d9041..7b07a47b 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> @@ -973,6 +973,7 @@ struct amdgpu_device { >>>       bool                            in_gpu_reset; >>>       enum pp_mp1_state               mp1_state; >>>       struct mutex  lock_reset; >>> +    struct mutex  lock_ib_sched; >>>       struct amdgpu_doorbell_index doorbell_index; >>>         int asic_reset_res; >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> index 676cad1..63cad74 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> @@ -2759,6 +2759,7 @@ int amdgpu_device_init(struct amdgpu_device >>> *adev, >>>       mutex_init(&adev->virt.vf_errors.lock); >>>       hash_init(adev->mn_hash); >>>       mutex_init(&adev->lock_reset); >>> +    mutex_init(&adev->lock_ib_sched); >>>       mutex_init(&adev->virt.dpm_mutex); >>>       mutex_init(&adev->psp.mutex); >>>   @@ -3795,7 +3796,9 @@ static int amdgpu_do_asic_reset(struct >>> amdgpu_hive_info *hive, >>>                   if (r) >>>                       return r; >>>   + mutex_lock(&tmp_adev->lock_ib_sched); >>>                   r = amdgpu_device_ip_resume_phase2(tmp_adev); >>> + mutex_unlock(&tmp_adev->lock_ib_sched); >>>                   if (r) >>>                       goto out; >>>   diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> index e1bad99..cd6082d 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> @@ -233,8 +233,10 @@ static struct dma_fence *amdgpu_job_run(struct >>> drm_sched_job *sched_job) >>>       if (finished->error < 0) { >>>           DRM_INFO("Skip scheduling IBs!\n"); >>>       } else { >>> +        mutex_lock(&ring->adev->lock_ib_sched); >>>           r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, >>>                          &fence); >>> +        mutex_unlock(&ring->adev->lock_ib_sched); >>>           if (r) >>>               DRM_ERROR("Error scheduling IBs (%d)\n", r); >>>       } >> > > _______________________________________________ > amd-gfx mailing list > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx --------------622BFDAF81EADBEC8F7B1A70 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 8bit
Am 24.10.19 um 17:06 schrieb Grodzovsky, Andrey:


On 10/24/19 7:01 AM, Christian König wrote:
Am 24.10.19 um 12:58 schrieb S, Shirish:
[Why]
Upon GPU reset, kernel cleans up already submitted jobs
via drm_sched_cleanup_jobs.
This schedules ib's via drm_sched_main()->run_job, leading to
race condition of rings being ready or not, since during reset
rings may be suspended.

NAK, exactly that's what should not happen.

The scheduler should be suspend while a GPU reset is in progress.

So you are running into a completely different race here.

Please sync up with Andrey how this was able to happen.

Regards,
Christian.


Shirish - Christian makes a good point - note that in amdgpu_device_gpu_recover drm_sched_stop which stop all the scheduler threads is called way before we suspend the HW in amdgpu_device_pre_asic_reset->amdgpu_device_ip_suspend where SDMA suspension is happening and where the HW ring marked as not ready - please provide call stack for when you hit [drm:amdgpu_job_run] *ERROR* Error scheduling IBs (-22) to identify the code path which tried to submit the SDMA IB


Well the most likely cause of this is that the hardware failed to resume after the reset.

Christian.

Andrey




[How]
make GPU reset's amdgpu_device_ip_resume_phase2() &
amdgpu_ib_schedule() in amdgpu_job_run() mutually exclusive.

Signed-off-by: Shirish S <shirish.s-5C7GfCeVMHo@public.gmane.org>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_job.c    | 2 ++
  3 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f4d9041..7b07a47b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -973,6 +973,7 @@ struct amdgpu_device {
      bool                            in_gpu_reset;
      enum pp_mp1_state               mp1_state;
      struct mutex  lock_reset;
+    struct mutex  lock_ib_sched;
      struct amdgpu_doorbell_index doorbell_index;
        int asic_reset_res;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 676cad1..63cad74 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2759,6 +2759,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
      mutex_init(&adev->virt.vf_errors.lock);
      hash_init(adev->mn_hash);
      mutex_init(&adev->lock_reset);
+    mutex_init(&adev->lock_ib_sched);
      mutex_init(&adev->virt.dpm_mutex);
      mutex_init(&adev->psp.mutex);
  @@ -3795,7 +3796,9 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
                  if (r)
                      return r;
  +                mutex_lock(&tmp_adev->lock_ib_sched);
                  r = amdgpu_device_ip_resume_phase2(tmp_adev);
+                mutex_unlock(&tmp_adev->lock_ib_sched);
                  if (r)
                      goto out;
  diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index e1bad99..cd6082d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -233,8 +233,10 @@ static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
      if (finished->error < 0) {
          DRM_INFO("Skip scheduling IBs!\n");
      } else {
+        mutex_lock(&ring->adev->lock_ib_sched);
          r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job,
                         &fence);
+        mutex_unlock(&ring->adev->lock_ib_sched);
          if (r)
              DRM_ERROR("Error scheduling IBs (%d)\n", r);
      } 


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([2a02:908:1252:fb60:be8a:bd56:1f94:86e7]) by smtp.gmail.com with ESMTPSA id h3sm11589793wrt.88.2019.10.24.09.30.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Oct 2019 09:30:07 -0700 (PDT) Subject: Re: [PATCH] drm/amdgpu: guard ib scheduling while in reset To: "Grodzovsky, Andrey" , "Koenig, Christian" , "S, Shirish" , "Deucher, Alexander" References: <1571914692-9430-1-git-send-email-shirish.s@amd.com> <23ea615d-5ef4-d0b3-a0ec-6fae67b102f2@gmail.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Thu, 24 Oct 2019 18:30:05 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=reply-to:subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language; bh=c7PSbSORHY5ZBBhplN3aw7fhAR9ipfgT874mndiNylE=; b=BhGMHxqkYucR/DoqK8Ii7pPOWo1+hEg8o0zVUuufqe88qb2RhZwnkDIxmfOOUQLIgN iKJJRDAk/MsecDkduDiCAJ6OaX4+qp1X7IQ/pOZWfUJWIXCf+uyLT5oYmFMjDKoHa9E4 BWgTJRKZGtq0n7MJUV3bjcLwveIU5i/lkTp7sB2W/R0YuquAPhPaJxdvGfB5LMx2QYRC ChYLvB5qL5RTku63Rx28E827w9axqmobELxxI3p5fcE1TPkAifdCcT8TN58BYRN4BSgs 1qlht63oTfwLeij9Edjogcjm3nW9unQOdikq+Huyd8oIF7W72SLi6AFQvUhJmPfncyEs +JrA== X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: christian.koenig@amd.com Cc: "amd-gfx@lists.freedesktop.org" Content-Type: multipart/mixed; boundary="===============1920156788==" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Message-ID: <20191024163005.L3zTkN0x0I_u9UwEekM5JfQo753lcpAi9_1s6aaOcUk@z> This is a multi-part message in MIME format. --===============1920156788== Content-Type: multipart/alternative; boundary="------------622BFDAF81EADBEC8F7B1A70" Content-Language: en-US This is a multi-part message in MIME format. --------------622BFDAF81EADBEC8F7B1A70 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Am 24.10.19 um 17:06 schrieb Grodzovsky, Andrey: > > > On 10/24/19 7:01 AM, Christian König wrote: >> Am 24.10.19 um 12:58 schrieb S, Shirish: >>> [Why] >>> Upon GPU reset, kernel cleans up already submitted jobs >>> via drm_sched_cleanup_jobs. >>> This schedules ib's via drm_sched_main()->run_job, leading to >>> race condition of rings being ready or not, since during reset >>> rings may be suspended. >> >> NAK, exactly that's what should not happen. >> >> The scheduler should be suspend while a GPU reset is in progress. >> >> So you are running into a completely different race here. >> >> Please sync up with Andrey how this was able to happen. >> >> Regards, >> Christian. > > > Shirish - Christian makes a good point - note that in > amdgpu_device_gpu_recover drm_sched_stop which stop all the scheduler > threads is called way before we suspend the HW in > amdgpu_device_pre_asic_reset->amdgpu_device_ip_suspend where SDMA > suspension is happening and where the HW ring marked as not ready - > please provide call stack for when you hit [drm:amdgpu_job_run] > *ERROR* Error scheduling IBs (-22) to identify the code path which > tried to submit the SDMA IB > Well the most likely cause of this is that the hardware failed to resume after the reset. Christian. > Andrey > > >> >>> >>> [How] >>> make GPU reset's amdgpu_device_ip_resume_phase2() & >>> amdgpu_ib_schedule() in amdgpu_job_run() mutually exclusive. >>> >>> Signed-off-by: Shirish S >>> --- >>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 + >>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ >>>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c    | 2 ++ >>>   3 files changed, 6 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> index f4d9041..7b07a47b 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >>> @@ -973,6 +973,7 @@ struct amdgpu_device { >>>       bool                            in_gpu_reset; >>>       enum pp_mp1_state               mp1_state; >>>       struct mutex  lock_reset; >>> +    struct mutex  lock_ib_sched; >>>       struct amdgpu_doorbell_index doorbell_index; >>>         int asic_reset_res; >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> index 676cad1..63cad74 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>> @@ -2759,6 +2759,7 @@ int amdgpu_device_init(struct amdgpu_device >>> *adev, >>>       mutex_init(&adev->virt.vf_errors.lock); >>>       hash_init(adev->mn_hash); >>>       mutex_init(&adev->lock_reset); >>> +    mutex_init(&adev->lock_ib_sched); >>>       mutex_init(&adev->virt.dpm_mutex); >>>       mutex_init(&adev->psp.mutex); >>>   @@ -3795,7 +3796,9 @@ static int amdgpu_do_asic_reset(struct >>> amdgpu_hive_info *hive, >>>                   if (r) >>>                       return r; >>>   + mutex_lock(&tmp_adev->lock_ib_sched); >>>                   r = amdgpu_device_ip_resume_phase2(tmp_adev); >>> + mutex_unlock(&tmp_adev->lock_ib_sched); >>>                   if (r) >>>                       goto out; >>>   diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> index e1bad99..cd6082d 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c >>> @@ -233,8 +233,10 @@ static struct dma_fence *amdgpu_job_run(struct >>> drm_sched_job *sched_job) >>>       if (finished->error < 0) { >>>           DRM_INFO("Skip scheduling IBs!\n"); >>>       } else { >>> +        mutex_lock(&ring->adev->lock_ib_sched); >>>           r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, >>>                          &fence); >>> +        mutex_unlock(&ring->adev->lock_ib_sched); >>>           if (r) >>>               DRM_ERROR("Error scheduling IBs (%d)\n", r); >>>       } >> > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx --------------622BFDAF81EADBEC8F7B1A70 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 8bit
Am 24.10.19 um 17:06 schrieb Grodzovsky, Andrey:


On 10/24/19 7:01 AM, Christian König wrote:
Am 24.10.19 um 12:58 schrieb S, Shirish:
[Why]
Upon GPU reset, kernel cleans up already submitted jobs
via drm_sched_cleanup_jobs.
This schedules ib's via drm_sched_main()->run_job, leading to
race condition of rings being ready or not, since during reset
rings may be suspended.

NAK, exactly that's what should not happen.

The scheduler should be suspend while a GPU reset is in progress.

So you are running into a completely different race here.

Please sync up with Andrey how this was able to happen.

Regards,
Christian.


Shirish - Christian makes a good point - note that in amdgpu_device_gpu_recover drm_sched_stop which stop all the scheduler threads is called way before we suspend the HW in amdgpu_device_pre_asic_reset->amdgpu_device_ip_suspend where SDMA suspension is happening and where the HW ring marked as not ready - please provide call stack for when you hit [drm:amdgpu_job_run] *ERROR* Error scheduling IBs (-22) to identify the code path which tried to submit the SDMA IB


Well the most likely cause of this is that the hardware failed to resume after the reset.

Christian.

Andrey




[How]
make GPU reset's amdgpu_device_ip_resume_phase2() &
amdgpu_ib_schedule() in amdgpu_job_run() mutually exclusive.

Signed-off-by: Shirish S <shirish.s@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_job.c    | 2 ++
  3 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f4d9041..7b07a47b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -973,6 +973,7 @@ struct amdgpu_device {
      bool                            in_gpu_reset;
      enum pp_mp1_state               mp1_state;
      struct mutex  lock_reset;
+    struct mutex  lock_ib_sched;
      struct amdgpu_doorbell_index doorbell_index;
        int asic_reset_res;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 676cad1..63cad74 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2759,6 +2759,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
      mutex_init(&adev->virt.vf_errors.lock);
      hash_init(adev->mn_hash);
      mutex_init(&adev->lock_reset);
+    mutex_init(&adev->lock_ib_sched);
      mutex_init(&adev->virt.dpm_mutex);
      mutex_init(&adev->psp.mutex);
  @@ -3795,7 +3796,9 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
                  if (r)
                      return r;
  +                mutex_lock(&tmp_adev->lock_ib_sched);
                  r = amdgpu_device_ip_resume_phase2(tmp_adev);
+                mutex_unlock(&tmp_adev->lock_ib_sched);
                  if (r)
                      goto out;
  diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index e1bad99..cd6082d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -233,8 +233,10 @@ static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
      if (finished->error < 0) {
          DRM_INFO("Skip scheduling IBs!\n");
      } else {
+        mutex_lock(&ring->adev->lock_ib_sched);
          r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job,
                         &fence);
+        mutex_unlock(&ring->adev->lock_ib_sched);
          if (r)
              DRM_ERROR("Error scheduling IBs (%d)\n", r);
      } 


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