From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B6B7246D551; Tue, 6 Oct 2026 15:29:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791300593; cv=none; b=TNpdzbF1oAlHPi1X+QzgD1rK6RNe4eyqjyf06yCqS08ex52Fn9ckhoj8VMKFMFOP7pD1I3F0/46RTd+nuiTB3q3ePiBBjC0Ebe1ou7Dorw7qWGhKEcOpW0IEFy/opNx0cH/07yFYDGehb+NB2BopWnCZEYj5aFTUb3tWac/iz+g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791300593; c=relaxed/simple; bh=Cq2ChUUi29FcSyV6R+MfcgNILg3gjc5iJHVVFE7Se6U=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=MfUx6+PuwqdoL8B7AuyVfFWYsT51arLu2xUG4lCIkSo7Kb04sLb01+RZhZFZXi8q5rknPwSOfGQ1wo0YyqHxkjiL7l3FzM1/TRaL0iBV8kzDMjyjoaQ17+i8mZD742gxQmdS0l36AE2A/g5XK30SoW9D0akGjGFbxFAK9lx8ga4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=DXvYGE59; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="DXvYGE59" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 70E671516; Tue, 6 Oct 2026 08:29:47 -0700 (PDT) Received: from [10.57.51.123] (unknown [10.57.51.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EC8F83F763; Tue, 6 Oct 2026 08:29:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1791300590; bh=Cq2ChUUi29FcSyV6R+MfcgNILg3gjc5iJHVVFE7Se6U=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=DXvYGE59Y6XCAHzrMr1lQkjNsC5xsRPLKCNqQuNz2//ABvPTzb/oAQVd4A82xAo+M WvfFzaXyCWXrmm3TDyOLqB3UmVAy14BpSKvh8cwuawHbVa1Md2YJPVL3nn2tWsdIdK YllCn4HXQ/wnXmLSXAlC524ZZuX9xQSwZ3Ta+GlI= Message-ID: Date: Tue, 6 Oct 2026 17:29:45 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 7/8] clk: sunxi-ng: a733: Add bus clock gates To: Junhui Liu , wens@kernel.org Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jernej Skrabec , Samuel Holland , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Richard Cochran , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, netdev@vger.kernel.org, Jerome Brunet , Enzo Adriano References: <20260930-a733-clk-v5-0-11175b41cd2d@pigmoral.tech> <20260930-a733-clk-v5-7-11175b41cd2d@pigmoral.tech> <4ac4c90f-887e-4545-9c26-9706bdaa1a79@arm.com> Content-Language: en-GB From: Andre Przywara In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi, On 10/6/26 16:50, Junhui Liu wrote: > Hi Andre, Chen-Yu, > > I ran some tests and now have a better understanding of the clock > hierarchy. Please see the results below. > > On Mon Oct 5, 2026 at 5:17 PM CST, Andre Przywara wrote: >> Hi, >> >> On 10/5/26 06:41, Junhui Liu wrote: >>> Hi Chen-Yu, >>> >>> On Sun Oct 4, 2026 at 7:03 PM CST, Chen-Yu Tsai wrote: >>>> On Tue, Sep 29, 2026 at 7:28 PM Junhui Liu wrote: >>>>> >>>>> Add the bus clock gates that control access to the devices' register >>>>> interface on the Allwinner A733 SoC. These clocks are typically >>>>> single-bit controls in the BGR registers, covering UARTs, SPI, I2C, and >>>>> various multimedia engines. It also includes bus gates for system >>>>> components like the IOMMU and MSI-lite interfaces. >>>>> >>>>> Also mark the ahb-store, mbus-store and ahb-cpus clocks as critical. >>>>> Disabling either store gate breaks access to boot/storage devices such >>>>> as MMC and SPI NOR, while gating ahb-cpus hangs any access to the CPUS >>>>> power domain registers when unused clocks are disabled. >>>>> >>>>> Tested-by: Jerome Brunet >>>>> Reviewed-by: Andre Przywara >>>>> Signed-off-by: Junhui Liu >>>>> --- >>>>> drivers/clk/sunxi-ng/ccu-sun60i-a733.c | 492 ++++++++++++++++++++++++++++++++- >>>>> 1 file changed, 491 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/drivers/clk/sunxi-ng/ccu-sun60i-a733.c b/drivers/clk/sunxi-ng/ccu-sun60i-a733.c >>>>> index 1b2d4d36ec4c..b077e5d2f32c 100644 >>>>> --- a/drivers/clk/sunxi-ng/ccu-sun60i-a733.c >>>>> +++ b/drivers/clk/sunxi-ng/ccu-sun60i-a733.c >>>>> @@ -4,6 +4,10 @@ >>>>> * Copyright (C) 2026 Junhui Liu >>>>> * Based on the A523 CCU driver: >>>>> * Copyright (C) 2023-2024 Arm Ltd. >>>>> + * >>>>> + * TODO: The real parents of some bus gates, including its-pcie0-aclk, >>>>> + * msi-lite, npu, ufs, sgpio, lpc and i2spcm, are not documented in the >>>>> + * manual. For now, follow the vendor BSP, which keeps them on hosc. >>>>> */ >>>> >>>> [...] >>>> >>>>> @@ -510,9 +522,118 @@ static SUNXI_CCU_M_DATA_WITH_MUX_GATE_FEAT(mbus_clk, "mbus", mbus_parents, 0x588 >>>>> BIT(31), /* gate */ >>>>> CLK_IS_CRITICAL, >>>>> CCU_FEATURE_UPDATE_BIT); >>>>> +static const struct clk_hw *mbus_hws[] = { &mbus_clk.common.hw }; >>>>> + >>>>> +static SUNXI_CCU_GATE_HWS(mbus_iommu0_sys_clk, "mbus-iommu0-sys", mbus_hws, 0x58c, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_HWS(apb_iommu0_sys_clk, "apb-iommu0-sys", apb0_hws, 0x58c, BIT(1), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_iommu0_sys_clk, "ahb-iommu0-sys", ahb_hws, 0x58c, BIT(2), 0); >>>>> + >>>>> +static SUNXI_CCU_GATE_DATA(bus_msi_lite0_clk, "bus-msi-lite0", hosc, 0x594, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_DATA(bus_msi_lite1_clk, "bus-msi-lite1", hosc, 0x59c, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_DATA(bus_msi_lite2_clk, "bus-msi-lite2", hosc, 0x5a4, BIT(0), 0); >>>>> + >>>>> +static SUNXI_CCU_GATE_HWS(mbus_iommu1_sys_clk, "mbus-iommu1-sys", mbus_hws, 0x5b4, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_HWS(apb_iommu1_sys_clk, "apb-iommu1-sys", apb0_hws, 0x5b4, BIT(1), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_iommu1_sys_clk, "ahb-iommu1-sys", ahb_hws, 0x5b4, BIT(2), 0); >>>> >>>>> +static SUNXI_CCU_GATE_HWS(ahb_ve_dec_clk, "ahb-ve-dec", ahb_hws, >>>>> + 0x5c0, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_ve_enc_clk, "ahb-ve-enc", ahb_hws, >>>>> + 0x5c0, BIT(1), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_vid_in_clk, "ahb-vid-in", ahb_hws, >>>>> + 0x5c0, BIT(2), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_vid_cout0_clk, "ahb-vid-cout0", ahb_hws, >>>>> + 0x5c0, BIT(3), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_vid_cout1_clk, "ahb-vid-cout1", ahb_hws, >>>>> + 0x5c0, BIT(4), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_de_clk, "ahb-de", ahb_hws, >>>>> + 0x5c0, BIT(5), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_npu_clk, "ahb-npu", ahb_hws, >>>>> + 0x5c0, BIT(6), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_gpu0_clk, "ahb-gpu0", ahb_hws, >>>>> + 0x5c0, BIT(7), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_serdes_clk, "ahb-serdes", ahb_hws, >>>>> + 0x5c0, BIT(8), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_usb_sys_clk, "ahb-usb-sys", ahb_hws, >>>>> + 0x5c0, BIT(9), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_msi_lite0_clk, "ahb-msi-lite0", ahb_hws, >>>>> + 0x5c0, BIT(16), 0); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_store_clk, "ahb-store", ahb_hws, >>>>> + 0x5c0, BIT(24), CLK_IS_CRITICAL); >>>>> +static SUNXI_CCU_GATE_HWS(ahb_cpus_clk, "ahb-cpus", ahb_hws, >>>>> + 0x5c0, BIT(28), CLK_IS_CRITICAL); >>>> >>>> I suspect these refer to a AHB-AHB bridge for the various subsystems shown >>>> in the memory map. That would explain why when the "ahb-store" clock is >>>> gated, the storage bits stop working. >>>> >>>> If that's the case, we should describe it as the parent of each storage >>>> peripheral bus gate's parent. Same would go for the other types. I haven't >>>> checked what the BSP does though. >>> >>> As Norman mentioned in his reply, the vendor BSP also does not model >>> this hierarchy and instead models these gates as independent clocks >>> parented to the oscillator. The manual does not describe the hierarchy >>> either, so I don't think we have enough information to model it >>> differently at this point. >> >> Well, I wouldn't use the BSP as a good example on how to model the clock >> tree, they have been very misguided in the past. > > Understood. I will not rely on the BSP's clock hierarchy. Well, I meant more the BSP software/DT modelling, as in: this device know needs now two input clocks. As you mentioned, the manual does not describe every relation, so we need to rely on the BSP for knowing the parents. But ... >> What the BSP does is to add just more input/gate MBUS clocks for each >> device, which is something I think we should avoid. >> To that regard using them as parent clocks for the existing gates, as >> Chen-Yu suggested, sounds like a good idea: We keep a single clock for >> the devices, but still can turn both clocks off (I think, not tested). > > I tested bus-mmc0, bus-mmc2, bus-spi0, bus-ufs, bus-nand0, and > bus-spif individually. Disabling each bus gate made the corresponding > controller's MMIO registers inaccessible: reads either returned zero or > a fixed invalid value. > > With those individual bus gates enabled, disabling ahb-store made the > MMIO registers of all those controllers inaccessible. Restoring > ahb-store made them accessible again. Ah, awesome, that's a good test, thanks for doing this! I thought that this clock is really about the data path, not the (MMIO register) control part, which is typically a separate low-speed bus (APB). Since that is somewhat surprising, it's probably best to add a comment in the code about that. > Based on these results, I plan to make ahb-store the parent of the > following bus clocks in the next version: Is ahb-store ungated at reset? > bus-nand0 > bus-mmc0 > bus-mmc1 > bus-mmc2 > bus-mmc3 > bus-spi0 > bus-spi1 > bus-spi2 > bus-spif > bus-spi3 > bus-spi4 > bus-ufs > > I directly tested MMC0, MMC2, SPI0, SPIF, NAND0, and UFS. The remaining > instances use the same type of bus gates in the same storage subsystem, > so I plan to model them in the same way. > > For mbus-store, testing with MMC0 and UFS showed that disabling it > breaks the storage DMA paths. When you say "storage DMA", you mean the actual DMA data path, using those chained descriptors? Does it work for PIO accesses, as U-Boot uses? > Most of these storage controllers do not have dedicated MBUS gate > clocks, so there is no clock that can be parented to mbus-store to model > their DMA dependency. Could this be like mbus-store -> ahb_store -> bus-{mmc,spi,ufs,nand}? Cheers, Andre > I therefore plan to keep mbus-store marked as > CLK_IS_CRITICAL, as we already do for the main mbus clock. For NAND, > which does have a dedicated mbus-nand gate, I will make mbus-store its > parent. > > I also tested NVMe, but disabling either ahb-store or mbus-store had no > effect on it. > > Does this approach look reasonable to you? > > Best regards, > Junhui Liu > >> >> Cheers, >> Andre >> >>> I will add comments explaining why ahb_store_clk, mbus_store_clk, and >>> ahb_cpus_clk are marked critical. >>> >>>> >>>>> +static SUNXI_CCU_GATE_HWS(mbus_iommu0_clk, "mbus-iommu0", mbus_hws, >>>>> + 0x5e0, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_iommu1_clk, "mbus-iommu1", mbus_hws, >>>>> + 0x5e0, BIT(1), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_desys_clk, "mbus-desys", mbus_hws, >>>>> + 0x5e0, BIT(11), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_ve_enc0_gate_clk, "mbus-ve-enc0-gate", mbus_hws, >>>>> + 0x5e0, BIT(12), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_ve_dec0_gate_clk, "mbus-ve-dec0-gate", mbus_hws, >>>>> + 0x5e0, BIT(14), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_gpu0_clk, "mbus-gpu0", mbus_hws, >>>>> + 0x5e0, BIT(16), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_npu_clk, "mbus-npu", mbus_hws, >>>>> + 0x5e0, BIT(18), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_vid_in_clk, "mbus-vid-in", mbus_hws, >>>>> + 0x5e0, BIT(24), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_serdes_clk, "mbus-serdes", mbus_hws, >>>>> + 0x5e0, BIT(28), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_msi_lite0_clk, "mbus-msi-lite0", mbus_hws, >>>>> + 0x5e0, BIT(29), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_store_clk, "mbus-store", mbus_hws, >>>>> + 0x5e0, BIT(30), CLK_IS_CRITICAL); >>>> >>>> Same thing for the MBUS clocks. >>>> >>>>> +static SUNXI_CCU_GATE_HWS(mbus_msi_lite2_clk, "mbus-msi-lite2", mbus_hws, >>>>> + 0x5e0, BIT(31), 0); >>>>> + >>>>> +static SUNXI_CCU_GATE_HWS(mbus_dma0_clk, "mbus-dma0", mbus_hws, >>>>> + 0x5e4, BIT(0), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_ve_enc0_clk, "mbus-ve-enc0", mbus_hws, >>>>> + 0x5e4, BIT(1), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_ce_clk, "mbus-ce", mbus_hws, >>>>> + 0x5e4, BIT(2), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_dma1_clk, "mbus-dma1", mbus_hws, >>>>> + 0x5e4, BIT(3), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_nand_clk, "mbus-nand", mbus_hws, >>>>> + 0x5e4, BIT(5), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_csi_clk, "mbus-csi", mbus_hws, >>>>> + 0x5e4, BIT(8), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_isp_clk, "mbus-isp", mbus_hws, >>>>> + 0x5e4, BIT(9), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_gmac0_clk, "mbus-gmac0", mbus_hws, >>>>> + 0x5e4, BIT(11), 0); >>>>> +/* Undocumented, taken from the vendor kernel. */ >>>>> +static SUNXI_CCU_GATE_HWS(mbus_gmac1_clk, "mbus-gmac1", mbus_hws, >>>>> + 0x5e4, BIT(12), 0); >>>>> +static SUNXI_CCU_GATE_HWS(mbus_ve_dec0_clk, "mbus-ve-dec0", mbus_hws, >>>>> + 0x5e4, BIT(18), 0); >>>> >>>> [...] >>>> >>>> The remaining definitions look correct (minus the vendor BSP ones which I >>>> couldn't check at this time). >>>> >>>> I didn't check the clock list additions. >>>> >>>> Consider this >>>> >>>> Reviewed-by: Chen-Yu Tsai >>>> >>> >>> Thanks! >>> >>>> >>>> We can change the AHB / MBUS clock parents later if we do figure it out. >>>> >>>> >>>> ChenYu >>> From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83565CA5FFC for ; Tue, 6 Oct 2026 15:30:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xlN5CJuCzviP4+pjhorewKOhsUqNQSyoyUrUoie2QXw=; b=kcRQ6DBneGpQQI 3o1BSjWX5j/J5w+JrYPnzfgaK7uU7x3iTkfryKsG47rp09uRR38XaiBW+osu5E1EXe+6MjxXgruOB 06kr9FXCjnXq+DjG3HMpmZlQR95xpaLFqaIz58fppm9Vhn73YMfcs6ZZ7mkPeCXHVphQA+OZSW4l+ MlAbRUq4xkaTJ/HsoXZg+8I4dBpOv7XLoBbO5Icqcb4pC/3NpU5pYVZqgtdzcSx7+gyq7S2TTE7SY KXEfZE16JaxfRYgbk5XuQaL2Fd0Q6hOJUFOA5YjfevaGe0WXqb7KrMGYn/fVFtJHTjlIfIiUyX/bD fgNZLf/oRlbdqm8QAKtA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xE778-000000012Aw-3998; Tue, 06 Oct 2026 15:29:58 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xE774-00000001293-2CuZ; Tue, 06 Oct 2026 15:29:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 70E671516; Tue, 6 Oct 2026 08:29:47 -0700 (PDT) Received: from [10.57.51.123] (unknown [10.57.51.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EC8F83F763; Tue, 6 Oct 2026 08:29:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1791300590; bh=Cq2ChUUi29FcSyV6R+MfcgNILg3gjc5iJHVVFE7Se6U=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=DXvYGE59Y6XCAHzrMr1lQkjNsC5xsRPLKCNqQuNz2//ABvPTzb/oAQVd4A82xAo+M WvfFzaXyCWXrmm3TDyOLqB3UmVAy14BpSKvh8cwuawHbVa1Md2YJPVL3nn2tWsdIdK YllCn4HXQ/wnXmLSXAlC524ZZuX9xQSwZ3Ta+GlI= Message-ID: Date: Tue, 6 Oct 2026 17:29:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 7/8] clk: sunxi-ng: a733: Add bus clock gates To: Junhui Liu , wens@kernel.org Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jernej Skrabec , Samuel Holland , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Richard Cochran , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, netdev@vger.kernel.org, Jerome Brunet , Enzo Adriano References: <20260930-a733-clk-v5-0-11175b41cd2d@pigmoral.tech> <20260930-a733-clk-v5-7-11175b41cd2d@pigmoral.tech> <4ac4c90f-887e-4545-9c26-9706bdaa1a79@arm.com> Content-Language: en-GB From: Andre Przywara In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261006_082954_653718_6C407FEF X-CRM114-Status: GOOD ( 37.76 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SGksCgpPbiAxMC82LzI2IDE2OjUwLCBKdW5odWkgTGl1IHdyb3RlOgo+IEhpIEFuZHJlLCBDaGVu LVl1LAo+IAo+IEkgcmFuIHNvbWUgdGVzdHMgYW5kIG5vdyBoYXZlIGEgYmV0dGVyIHVuZGVyc3Rh bmRpbmcgb2YgdGhlIGNsb2NrCj4gaGllcmFyY2h5LiBQbGVhc2Ugc2VlIHRoZSByZXN1bHRzIGJl bG93Lgo+IAo+IE9uIE1vbiBPY3QgNSwgMjAyNiBhdCA1OjE3IFBNIENTVCwgQW5kcmUgUHJ6eXdh cmEgd3JvdGU6Cj4+IEhpLAo+Pgo+PiBPbiAxMC81LzI2IDA2OjQxLCBKdW5odWkgTGl1IHdyb3Rl Ogo+Pj4gSGkgQ2hlbi1ZdSwKPj4+Cj4+PiBPbiBTdW4gT2N0IDQsIDIwMjYgYXQgNzowMyBQTSBD U1QsIENoZW4tWXUgVHNhaSB3cm90ZToKPj4+PiBPbiBUdWUsIFNlcCAyOSwgMjAyNiBhdCA3OjI4 4oCvUE0gSnVuaHVpIExpdSA8anVuaHVpLmxpdUBwaWdtb3JhbC50ZWNoPiB3cm90ZToKPj4+Pj4K Pj4+Pj4gQWRkIHRoZSBidXMgY2xvY2sgZ2F0ZXMgdGhhdCBjb250cm9sIGFjY2VzcyB0byB0aGUg ZGV2aWNlcycgcmVnaXN0ZXIKPj4+Pj4gaW50ZXJmYWNlIG9uIHRoZSBBbGx3aW5uZXIgQTczMyBT b0MuIFRoZXNlIGNsb2NrcyBhcmUgdHlwaWNhbGx5Cj4+Pj4+IHNpbmdsZS1iaXQgY29udHJvbHMg aW4gdGhlIEJHUiByZWdpc3RlcnMsIGNvdmVyaW5nIFVBUlRzLCBTUEksIEkyQywgYW5kCj4+Pj4+ IHZhcmlvdXMgbXVsdGltZWRpYSBlbmdpbmVzLiBJdCBhbHNvIGluY2x1ZGVzIGJ1cyBnYXRlcyBm b3Igc3lzdGVtCj4+Pj4+IGNvbXBvbmVudHMgbGlrZSB0aGUgSU9NTVUgYW5kIE1TSS1saXRlIGlu dGVyZmFjZXMuCj4+Pj4+Cj4+Pj4+IEFsc28gbWFyayB0aGUgYWhiLXN0b3JlLCBtYnVzLXN0b3Jl IGFuZCBhaGItY3B1cyBjbG9ja3MgYXMgY3JpdGljYWwuCj4+Pj4+IERpc2FibGluZyBlaXRoZXIg c3RvcmUgZ2F0ZSBicmVha3MgYWNjZXNzIHRvIGJvb3Qvc3RvcmFnZSBkZXZpY2VzIHN1Y2gKPj4+ Pj4gYXMgTU1DIGFuZCBTUEkgTk9SLCB3aGlsZSBnYXRpbmcgYWhiLWNwdXMgaGFuZ3MgYW55IGFj Y2VzcyB0byB0aGUgQ1BVUwo+Pj4+PiBwb3dlciBkb21haW4gcmVnaXN0ZXJzIHdoZW4gdW51c2Vk IGNsb2NrcyBhcmUgZGlzYWJsZWQuCj4+Pj4+Cj4+Pj4+IFRlc3RlZC1ieTogSmVyb21lIEJydW5l dCA8amJydW5ldEBiYXlsaWJyZS5jb20+Cj4+Pj4+IFJldmlld2VkLWJ5OiBBbmRyZSBQcnp5d2Fy YSA8YW5kcmUucHJ6eXdhcmFAYXJtLmNvbT4KPj4+Pj4gU2lnbmVkLW9mZi1ieTogSnVuaHVpIExp dSA8anVuaHVpLmxpdUBwaWdtb3JhbC50ZWNoPgo+Pj4+PiAtLS0KPj4+Pj4gICAgZHJpdmVycy9j bGsvc3VueGktbmcvY2N1LXN1bjYwaS1hNzMzLmMgfCA0OTIgKysrKysrKysrKysrKysrKysrKysr KysrKysrKysrKystCj4+Pj4+ICAgIDEgZmlsZSBjaGFuZ2VkLCA0OTEgaW5zZXJ0aW9ucygrKSwg MSBkZWxldGlvbigtKQo+Pj4+Pgo+Pj4+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc3VueGkt bmcvY2N1LXN1bjYwaS1hNzMzLmMgYi9kcml2ZXJzL2Nsay9zdW54aS1uZy9jY3Utc3VuNjBpLWE3 MzMuYwo+Pj4+PiBpbmRleCAxYjJkNGQzNmVjNGMuLmIwNzdlNWQyZjMyYyAxMDA2NDQKPj4+Pj4g LS0tIGEvZHJpdmVycy9jbGsvc3VueGktbmcvY2N1LXN1bjYwaS1hNzMzLmMKPj4+Pj4gKysrIGIv ZHJpdmVycy9jbGsvc3VueGktbmcvY2N1LXN1bjYwaS1hNzMzLmMKPj4+Pj4gQEAgLTQsNiArNCwx MCBAQAo+Pj4+PiAgICAgKiBDb3B5cmlnaHQgKEMpIDIwMjYgSnVuaHVpIExpdSA8anVuaHVpLmxp dUBwaWdtb3JhbC50ZWNoPgo+Pj4+PiAgICAgKiBCYXNlZCBvbiB0aGUgQTUyMyBDQ1UgZHJpdmVy Ogo+Pj4+PiAgICAgKiAgIENvcHlyaWdodCAoQykgMjAyMy0yMDI0IEFybSBMdGQuCj4+Pj4+ICsg Kgo+Pj4+PiArICogVE9ETzogVGhlIHJlYWwgcGFyZW50cyBvZiBzb21lIGJ1cyBnYXRlcywgaW5j bHVkaW5nIGl0cy1wY2llMC1hY2xrLAo+Pj4+PiArICogbXNpLWxpdGUsIG5wdSwgdWZzLCBzZ3Bp bywgbHBjIGFuZCBpMnNwY20sIGFyZSBub3QgZG9jdW1lbnRlZCBpbiB0aGUKPj4+Pj4gKyAqIG1h bnVhbC4gRm9yIG5vdywgZm9sbG93IHRoZSB2ZW5kb3IgQlNQLCB3aGljaCBrZWVwcyB0aGVtIG9u IGhvc2MuCj4+Pj4+ICAgICAqLwo+Pj4+Cj4+Pj4gWy4uLl0KPj4+Pgo+Pj4+PiBAQCAtNTEwLDkg KzUyMiwxMTggQEAgc3RhdGljIFNVTlhJX0NDVV9NX0RBVEFfV0lUSF9NVVhfR0FURV9GRUFUKG1i dXNfY2xrLCAibWJ1cyIsIG1idXNfcGFyZW50cywgMHg1ODgKPj4+Pj4gICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgQklUKDMxKSwgICAgIC8qIGdhdGUgKi8KPj4+ Pj4gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgQ0xLX0lTX0NS SVRJQ0FMLAo+Pj4+PiAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICBDQ1VfRkVBVFVSRV9VUERBVEVfQklUKTsKPj4+Pj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgY2xr X2h3ICptYnVzX2h3c1tdID0geyAmbWJ1c19jbGsuY29tbW9uLmh3IH07Cj4+Pj4+ICsKPj4+Pj4g K3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MobWJ1c19pb21tdTBfc3lzX2NsaywgIm1idXMtaW9t bXUwLXN5cyIsIG1idXNfaHdzLCAweDU4YywgQklUKDApLCAwKTsKPj4+Pj4gK3N0YXRpYyBTVU5Y SV9DQ1VfR0FURV9IV1MoYXBiX2lvbW11MF9zeXNfY2xrLCAiYXBiLWlvbW11MC1zeXMiLCBhcGIw X2h3cywgMHg1OGMsIEJJVCgxKSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdT KGFoYl9pb21tdTBfc3lzX2NsaywgImFoYi1pb21tdTAtc3lzIiwgYWhiX2h3cywgMHg1OGMsIEJJ VCgyKSwgMCk7Cj4+Pj4+ICsKPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9EQVRBKGJ1c19t c2lfbGl0ZTBfY2xrLCAiYnVzLW1zaS1saXRlMCIsIGhvc2MsIDB4NTk0LCBCSVQoMCksIDApOwo+ Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0RBVEEoYnVzX21zaV9saXRlMV9jbGssICJidXMt bXNpLWxpdGUxIiwgaG9zYywgMHg1OWMsIEJJVCgwKSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElf Q0NVX0dBVEVfREFUQShidXNfbXNpX2xpdGUyX2NsaywgImJ1cy1tc2ktbGl0ZTIiLCBob3NjLCAw eDVhNCwgQklUKDApLCAwKTsKPj4+Pj4gKwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hX UyhtYnVzX2lvbW11MV9zeXNfY2xrLCAibWJ1cy1pb21tdTEtc3lzIiwgbWJ1c19od3MsIDB4NWI0 LCBCSVQoMCksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhcGJfaW9tbXUx X3N5c19jbGssICJhcGItaW9tbXUxLXN5cyIsIGFwYjBfaHdzLCAweDViNCwgQklUKDEpLCAwKTsK Pj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MoYWhiX2lvbW11MV9zeXNfY2xrLCAiYWhi LWlvbW11MS1zeXMiLCBhaGJfaHdzLCAweDViNCwgQklUKDIpLCAwKTsKPj4+Pgo+Pj4+PiArc3Rh dGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfdmVfZGVjX2NsaywgImFoYi12ZS1kZWMiLCBhaGJf aHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQoMCksIDApOwo+ Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfdmVfZW5jX2NsaywgImFoYi12ZS1l bmMiLCBhaGJfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQo MSksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfdmlkX2luX2Nsaywg ImFoYi12aWQtaW4iLCBhaGJfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4 NWMwLCBCSVQoMiksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfdmlk X2NvdXQwX2NsaywgImFoYi12aWQtY291dDAiLCBhaGJfaHdzLAo+Pj4+PiArICAgICAgICAgICAg ICAgICAgICAgICAgIDB4NWMwLCBCSVQoMyksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9H QVRFX0hXUyhhaGJfdmlkX2NvdXQxX2NsaywgImFoYi12aWQtY291dDEiLCBhaGJfaHdzLAo+Pj4+ PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQoNCksIDApOwo+Pj4+PiArc3Rh dGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfZGVfY2xrLCAiYWhiLWRlIiwgYWhiX2h3cywKPj4+ Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAweDVjMCwgQklUKDUpLCAwKTsKPj4+Pj4gK3N0 YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MoYWhiX25wdV9jbGssICJhaGItbnB1IiwgYWhiX2h3cywK Pj4+Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAweDVjMCwgQklUKDYpLCAwKTsKPj4+Pj4g K3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MoYWhiX2dwdTBfY2xrLCAiYWhiLWdwdTAiLCBhaGJf aHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQoNyksIDApOwo+ Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfc2VyZGVzX2NsaywgImFoYi1zZXJk ZXMiLCBhaGJfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQo OCksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhhaGJfdXNiX3N5c19jbGss ICJhaGItdXNiLXN5cyIsIGFoYl9od3MsCj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAg MHg1YzAsIEJJVCg5KSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdTKGFoYl9t c2lfbGl0ZTBfY2xrLCAiYWhiLW1zaS1saXRlMCIsIGFoYl9od3MsCj4+Pj4+ICsgICAgICAgICAg ICAgICAgICAgICAgICAgMHg1YzAsIEJJVCgxNiksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0ND VV9HQVRFX0hXUyhhaGJfc3RvcmVfY2xrLCAiYWhiLXN0b3JlIiwgYWhiX2h3cywKPj4+Pj4gKyAg ICAgICAgICAgICAgICAgICAgICAgICAweDVjMCwgQklUKDI0KSwgQ0xLX0lTX0NSSVRJQ0FMKTsK Pj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MoYWhiX2NwdXNfY2xrLCAiYWhiLWNwdXMi LCBhaGJfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWMwLCBCSVQoMjgp LCBDTEtfSVNfQ1JJVElDQUwpOwo+Pj4+Cj4+Pj4gSSBzdXNwZWN0IHRoZXNlIHJlZmVyIHRvIGEg QUhCLUFIQiBicmlkZ2UgZm9yIHRoZSB2YXJpb3VzIHN1YnN5c3RlbXMgc2hvd24KPj4+PiBpbiB0 aGUgbWVtb3J5IG1hcC4gVGhhdCB3b3VsZCBleHBsYWluIHdoeSB3aGVuIHRoZSAiYWhiLXN0b3Jl IiBjbG9jayBpcwo+Pj4+IGdhdGVkLCB0aGUgc3RvcmFnZSBiaXRzIHN0b3Agd29ya2luZy4KPj4+ Pgo+Pj4+IElmIHRoYXQncyB0aGUgY2FzZSwgd2Ugc2hvdWxkIGRlc2NyaWJlIGl0IGFzIHRoZSBw YXJlbnQgb2YgZWFjaCBzdG9yYWdlCj4+Pj4gcGVyaXBoZXJhbCBidXMgZ2F0ZSdzIHBhcmVudC4g U2FtZSB3b3VsZCBnbyBmb3IgdGhlIG90aGVyIHR5cGVzLiBJIGhhdmVuJ3QKPj4+PiBjaGVja2Vk IHdoYXQgdGhlIEJTUCBkb2VzIHRob3VnaC4KPj4+Cj4+PiBBcyBOb3JtYW4gbWVudGlvbmVkIGlu IGhpcyByZXBseSwgdGhlIHZlbmRvciBCU1AgYWxzbyBkb2VzIG5vdCBtb2RlbAo+Pj4gdGhpcyBo aWVyYXJjaHkgYW5kIGluc3RlYWQgbW9kZWxzIHRoZXNlIGdhdGVzIGFzIGluZGVwZW5kZW50IGNs b2Nrcwo+Pj4gcGFyZW50ZWQgdG8gdGhlIG9zY2lsbGF0b3IuIFRoZSBtYW51YWwgZG9lcyBub3Qg ZGVzY3JpYmUgdGhlIGhpZXJhcmNoeQo+Pj4gZWl0aGVyLCBzbyBJIGRvbid0IHRoaW5rIHdlIGhh dmUgZW5vdWdoIGluZm9ybWF0aW9uIHRvIG1vZGVsIGl0Cj4+PiBkaWZmZXJlbnRseSBhdCB0aGlz IHBvaW50Lgo+Pgo+PiBXZWxsLCBJIHdvdWxkbid0IHVzZSB0aGUgQlNQIGFzIGEgZ29vZCBleGFt cGxlIG9uIGhvdyB0byBtb2RlbCB0aGUgY2xvY2sKPj4gdHJlZSwgdGhleSBoYXZlIGJlZW4gdmVy eSBtaXNndWlkZWQgaW4gdGhlIHBhc3QuCj4gCj4gVW5kZXJzdG9vZC4gSSB3aWxsIG5vdCByZWx5 IG9uIHRoZSBCU1AncyBjbG9jayBoaWVyYXJjaHkuCgpXZWxsLCBJIG1lYW50IG1vcmUgdGhlIEJT UCBzb2Z0d2FyZS9EVCBtb2RlbGxpbmcsIGFzIGluOiB0aGlzIGRldmljZSAKa25vdyBuZWVkcyBu b3cgdHdvIGlucHV0IGNsb2Nrcy4gQXMgeW91IG1lbnRpb25lZCwgdGhlIG1hbnVhbCBkb2VzIG5v dCAKZGVzY3JpYmUgZXZlcnkgcmVsYXRpb24sIHNvIHdlIG5lZWQgdG8gcmVseSBvbiB0aGUgQlNQ IGZvciBrbm93aW5nIHRoZSAKcGFyZW50cy4gQnV0IC4uLgoKPj4gV2hhdCB0aGUgQlNQIGRvZXMg aXMgdG8gYWRkIGp1c3QgbW9yZSBpbnB1dC9nYXRlIE1CVVMgY2xvY2tzIGZvciBlYWNoCj4+IGRl dmljZSwgd2hpY2ggaXMgc29tZXRoaW5nIEkgdGhpbmsgd2Ugc2hvdWxkIGF2b2lkLgo+PiBUbyB0 aGF0IHJlZ2FyZCB1c2luZyB0aGVtIGFzIHBhcmVudCBjbG9ja3MgZm9yIHRoZSBleGlzdGluZyBn YXRlcywgYXMKPj4gQ2hlbi1ZdSBzdWdnZXN0ZWQsIHNvdW5kcyBsaWtlIGEgZ29vZCBpZGVhOiBX ZSBrZWVwIGEgc2luZ2xlIGNsb2NrIGZvcgo+PiB0aGUgZGV2aWNlcywgYnV0IHN0aWxsIGNhbiB0 dXJuIGJvdGggY2xvY2tzIG9mZiAoSSB0aGluaywgbm90IHRlc3RlZCkuCj4gCj4gSSB0ZXN0ZWQg YnVzLW1tYzAsIGJ1cy1tbWMyLCBidXMtc3BpMCwgYnVzLXVmcywgYnVzLW5hbmQwLCBhbmQKPiBi dXMtc3BpZiBpbmRpdmlkdWFsbHkuIERpc2FibGluZyBlYWNoIGJ1cyBnYXRlIG1hZGUgdGhlIGNv cnJlc3BvbmRpbmcKPiBjb250cm9sbGVyJ3MgTU1JTyByZWdpc3RlcnMgaW5hY2Nlc3NpYmxlOiBy ZWFkcyBlaXRoZXIgcmV0dXJuZWQgemVybyBvcgo+IGEgZml4ZWQgaW52YWxpZCB2YWx1ZS4KPiAK PiBXaXRoIHRob3NlIGluZGl2aWR1YWwgYnVzIGdhdGVzIGVuYWJsZWQsIGRpc2FibGluZyBhaGIt c3RvcmUgbWFkZSB0aGUKPiBNTUlPIHJlZ2lzdGVycyBvZiBhbGwgdGhvc2UgY29udHJvbGxlcnMg aW5hY2Nlc3NpYmxlLiBSZXN0b3JpbmcKPiBhaGItc3RvcmUgbWFkZSB0aGVtIGFjY2Vzc2libGUg YWdhaW4uCgpBaCwgYXdlc29tZSwgdGhhdCdzIGEgZ29vZCB0ZXN0LCB0aGFua3MgZm9yIGRvaW5n IHRoaXMhIEkgdGhvdWdodCB0aGF0IAp0aGlzIGNsb2NrIGlzIHJlYWxseSBhYm91dCB0aGUgZGF0 YSBwYXRoLCBub3QgdGhlIChNTUlPIHJlZ2lzdGVyKSAKY29udHJvbCBwYXJ0LCB3aGljaCBpcyB0 eXBpY2FsbHkgYSBzZXBhcmF0ZSBsb3ctc3BlZWQgYnVzIChBUEIpLgpTaW5jZSB0aGF0IGlzIHNv bWV3aGF0IHN1cnByaXNpbmcsIGl0J3MgcHJvYmFibHkgYmVzdCB0byBhZGQgYSBjb21tZW50IApp biB0aGUgY29kZSBhYm91dCB0aGF0LgoKPiBCYXNlZCBvbiB0aGVzZSByZXN1bHRzLCBJIHBsYW4g dG8gbWFrZSBhaGItc3RvcmUgdGhlIHBhcmVudCBvZiB0aGUKPiBmb2xsb3dpbmcgYnVzIGNsb2Nr cyBpbiB0aGUgbmV4dCB2ZXJzaW9uOgoKSXMgYWhiLXN0b3JlIHVuZ2F0ZWQgYXQgcmVzZXQ/Cgo+ ICAgIGJ1cy1uYW5kMAo+ICAgIGJ1cy1tbWMwCj4gICAgYnVzLW1tYzEKPiAgICBidXMtbW1jMgo+ ICAgIGJ1cy1tbWMzCj4gICAgYnVzLXNwaTAKPiAgICBidXMtc3BpMQo+ICAgIGJ1cy1zcGkyCj4g ICAgYnVzLXNwaWYKPiAgICBidXMtc3BpMwo+ICAgIGJ1cy1zcGk0Cj4gICAgYnVzLXVmcwo+IAo+ IEkgZGlyZWN0bHkgdGVzdGVkIE1NQzAsIE1NQzIsIFNQSTAsIFNQSUYsIE5BTkQwLCBhbmQgVUZT LiBUaGUgcmVtYWluaW5nCj4gaW5zdGFuY2VzIHVzZSB0aGUgc2FtZSB0eXBlIG9mIGJ1cyBnYXRl cyBpbiB0aGUgc2FtZSBzdG9yYWdlIHN1YnN5c3RlbSwKPiBzbyBJIHBsYW4gdG8gbW9kZWwgdGhl bSBpbiB0aGUgc2FtZSB3YXkuCj4gCj4gRm9yIG1idXMtc3RvcmUsIHRlc3Rpbmcgd2l0aCBNTUMw IGFuZCBVRlMgc2hvd2VkIHRoYXQgZGlzYWJsaW5nIGl0Cj4gYnJlYWtzIHRoZSBzdG9yYWdlIERN QSBwYXRocy4KCldoZW4geW91IHNheSAic3RvcmFnZSBETUEiLCB5b3UgbWVhbiB0aGUgYWN0dWFs IERNQSBkYXRhIHBhdGgsIHVzaW5nIAp0aG9zZSBjaGFpbmVkIGRlc2NyaXB0b3JzPyBEb2VzIGl0 IHdvcmsgZm9yIFBJTyBhY2Nlc3NlcywgYXMgVS1Cb290IHVzZXM/Cgo+IE1vc3Qgb2YgdGhlc2Ug c3RvcmFnZSBjb250cm9sbGVycyBkbyBub3QgaGF2ZSBkZWRpY2F0ZWQgTUJVUyBnYXRlCj4gY2xv Y2tzLCBzbyB0aGVyZSBpcyBubyBjbG9jayB0aGF0IGNhbiBiZSBwYXJlbnRlZCB0byBtYnVzLXN0 b3JlIHRvIG1vZGVsCj4gdGhlaXIgRE1BIGRlcGVuZGVuY3kuCgpDb3VsZCB0aGlzIGJlIGxpa2Ug bWJ1cy1zdG9yZSAtPiBhaGJfc3RvcmUgLT4gYnVzLXttbWMsc3BpLHVmcyxuYW5kfTxuPj8KCkNo ZWVycywKQW5kcmUKCj4gSSB0aGVyZWZvcmUgcGxhbiB0byBrZWVwIG1idXMtc3RvcmUgbWFya2Vk IGFzCj4gQ0xLX0lTX0NSSVRJQ0FMLCBhcyB3ZSBhbHJlYWR5IGRvIGZvciB0aGUgbWFpbiBtYnVz IGNsb2NrLiBGb3IgTkFORCwKPiB3aGljaCBkb2VzIGhhdmUgYSBkZWRpY2F0ZWQgbWJ1cy1uYW5k IGdhdGUsIEkgd2lsbCBtYWtlIG1idXMtc3RvcmUgaXRzCj4gcGFyZW50Lgo+IAo+IEkgYWxzbyB0 ZXN0ZWQgTlZNZSwgYnV0IGRpc2FibGluZyBlaXRoZXIgYWhiLXN0b3JlIG9yIG1idXMtc3RvcmUg aGFkIG5vCj4gZWZmZWN0IG9uIGl0Lgo+IAo+IERvZXMgdGhpcyBhcHByb2FjaCBsb29rIHJlYXNv bmFibGUgdG8geW91Pwo+IAo+IEJlc3QgcmVnYXJkcywKPiBKdW5odWkgTGl1Cj4gCj4+Cj4+IENo ZWVycywKPj4gQW5kcmUKPj4KPj4+IEkgd2lsbCBhZGQgY29tbWVudHMgZXhwbGFpbmluZyB3aHkg YWhiX3N0b3JlX2NsaywgbWJ1c19zdG9yZV9jbGssIGFuZAo+Pj4gYWhiX2NwdXNfY2xrIGFyZSBt YXJrZWQgY3JpdGljYWwuCj4+Pgo+Pj4+Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdT KG1idXNfaW9tbXUwX2NsaywgIm1idXMtaW9tbXUwIiwgbWJ1c19od3MsCj4+Pj4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJVCgwKSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElf Q0NVX0dBVEVfSFdTKG1idXNfaW9tbXUxX2NsaywgIm1idXMtaW9tbXUxIiwgbWJ1c19od3MsCj4+ Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJVCgxKSwgMCk7Cj4+Pj4+ICtz dGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdTKG1idXNfZGVzeXNfY2xrLCAibWJ1cy1kZXN5cyIsIG1i dXNfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWUwLCBCSVQoMTEpLCAw KTsKPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MobWJ1c192ZV9lbmMwX2dhdGVfY2xr LCAibWJ1cy12ZS1lbmMwLWdhdGUiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAgICAgICAg ICAgICAgICAweDVlMCwgQklUKDEyKSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVf SFdTKG1idXNfdmVfZGVjMF9nYXRlX2NsaywgIm1idXMtdmUtZGVjMC1nYXRlIiwgbWJ1c19od3Ms Cj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJVCgxNCksIDApOwo+Pj4+ PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhtYnVzX2dwdTBfY2xrLCAibWJ1cy1ncHUwIiwg bWJ1c19od3MsCj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJVCgxNiks IDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhtYnVzX25wdV9jbGssICJtYnVz LW5wdSIsIG1idXNfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWUwLCBC SVQoMTgpLCAwKTsKPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MobWJ1c192aWRfaW5f Y2xrLCAibWJ1cy12aWQtaW4iLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAgICAgICAgICAg ICAgICAweDVlMCwgQklUKDI0KSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdT KG1idXNfc2VyZGVzX2NsaywgIm1idXMtc2VyZGVzIiwgbWJ1c19od3MsCj4+Pj4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJVCgyOCksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJ X0NDVV9HQVRFX0hXUyhtYnVzX21zaV9saXRlMF9jbGssICJtYnVzLW1zaS1saXRlMCIsIG1idXNf aHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWUwLCBCSVQoMjkpLCAwKTsK Pj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MobWJ1c19zdG9yZV9jbGssICJtYnVzLXN0 b3JlIiwgbWJ1c19od3MsCj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTAsIEJJ VCgzMCksIENMS19JU19DUklUSUNBTCk7Cj4+Pj4KPj4+PiBTYW1lIHRoaW5nIGZvciB0aGUgTUJV UyBjbG9ja3MuCj4+Pj4KPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9IV1MobWJ1c19tc2lf bGl0ZTJfY2xrLCAibWJ1cy1tc2ktbGl0ZTIiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAg ICAgICAgICAgICAgICAweDVlMCwgQklUKDMxKSwgMCk7Cj4+Pj4+ICsKPj4+Pj4gK3N0YXRpYyBT VU5YSV9DQ1VfR0FURV9IV1MobWJ1c19kbWEwX2NsaywgIm1idXMtZG1hMCIsIG1idXNfaHdzLAo+ Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWU0LCBCSVQoMCksIDApOwo+Pj4+PiAr c3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhtYnVzX3ZlX2VuYzBfY2xrLCAibWJ1cy12ZS1lbmMw IiwgbWJ1c19od3MsCj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTQsIEJJVCgx KSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdTKG1idXNfY2VfY2xrLCAibWJ1 cy1jZSIsIG1idXNfaHdzLAo+Pj4+PiArICAgICAgICAgICAgICAgICAgICAgICAgIDB4NWU0LCBC SVQoMiksIDApOwo+Pj4+PiArc3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhtYnVzX2RtYTFfY2xr LCAibWJ1cy1kbWExIiwgbWJ1c19od3MsCj4+Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAg MHg1ZTQsIEJJVCgzKSwgMCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdTKG1idXNf bmFuZF9jbGssICJtYnVzLW5hbmQiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAgICAgICAg ICAgICAgICAweDVlNCwgQklUKDUpLCAwKTsKPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1VfR0FURV9I V1MobWJ1c19jc2lfY2xrLCAibWJ1cy1jc2kiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAg ICAgICAgICAgICAgICAweDVlNCwgQklUKDgpLCAwKTsKPj4+Pj4gK3N0YXRpYyBTVU5YSV9DQ1Vf R0FURV9IV1MobWJ1c19pc3BfY2xrLCAibWJ1cy1pc3AiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAg ICAgICAgICAgICAgICAgICAgICAweDVlNCwgQklUKDkpLCAwKTsKPj4+Pj4gK3N0YXRpYyBTVU5Y SV9DQ1VfR0FURV9IV1MobWJ1c19nbWFjMF9jbGssICJtYnVzLWdtYWMwIiwgbWJ1c19od3MsCj4+ Pj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgMHg1ZTQsIEJJVCgxMSksIDApOwo+Pj4+PiAr LyogVW5kb2N1bWVudGVkLCB0YWtlbiBmcm9tIHRoZSB2ZW5kb3Iga2VybmVsLiAqLwo+Pj4+PiAr c3RhdGljIFNVTlhJX0NDVV9HQVRFX0hXUyhtYnVzX2dtYWMxX2NsaywgIm1idXMtZ21hYzEiLCBt YnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAweDVlNCwgQklUKDEyKSwg MCk7Cj4+Pj4+ICtzdGF0aWMgU1VOWElfQ0NVX0dBVEVfSFdTKG1idXNfdmVfZGVjMF9jbGssICJt YnVzLXZlLWRlYzAiLCBtYnVzX2h3cywKPj4+Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAw eDVlNCwgQklUKDE4KSwgMCk7Cj4+Pj4KPj4+PiBbLi4uXQo+Pj4+Cj4+Pj4gVGhlIHJlbWFpbmlu ZyBkZWZpbml0aW9ucyBsb29rIGNvcnJlY3QgKG1pbnVzIHRoZSB2ZW5kb3IgQlNQIG9uZXMgd2hp Y2ggSQo+Pj4+IGNvdWxkbid0IGNoZWNrIGF0IHRoaXMgdGltZSkuCj4+Pj4KPj4+PiBJIGRpZG4n dCBjaGVjayB0aGUgY2xvY2sgbGlzdCBhZGRpdGlvbnMuCj4+Pj4KPj4+PiBDb25zaWRlciB0aGlz Cj4+Pj4KPj4+PiBSZXZpZXdlZC1ieTogQ2hlbi1ZdSBUc2FpIDx3ZW5zQGtlcm5lbC5vcmc+Cj4+ Pj4KPj4+Cj4+PiBUaGFua3MhCj4+Pgo+Pj4+Cj4+Pj4gV2UgY2FuIGNoYW5nZSB0aGUgQUhCIC8g TUJVUyBjbG9jayBwYXJlbnRzIGxhdGVyIGlmIHdlIGRvIGZpZ3VyZSBpdCBvdXQuCj4+Pj4KPj4+ Pgo+Pj4+IENoZW5ZdQo+Pj4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpsaW51eC1yaXNjdiBtYWlsaW5nIGxpc3QKbGludXgtcmlzY3ZAbGlzdHMuaW5m cmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xp bnV4LXJpc2N2Cg==