From: Matthew Auld <matthew.auld@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v3 2/6] drm/xe/mmio: Map MMIO BAR using managed version of pci_iomap
Date: Mon, 22 Jun 2026 16:43:12 +0100 [thread overview]
Message-ID: <d7ea96de-ed98-4447-90c8-cd4d878a9d14@intel.com> (raw)
In-Reply-To: <20260622132342.19600-3-michal.wajdeczko@intel.com>
On 22/06/2026 14:23, Michal Wajdeczko wrote:
> This will allow us to simplify our custom release action where we
> will keep only zeroing of the xe->mmio.regs as we still rely on it
> all checks during all xe_mmio operations. While around, add missing
> kernel-doc for the function and update the error message.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
> ---
> v2: keep fini action to zero xe->mmio.regs (Matthew)
> ---
> drivers/gpu/drm/xe/xe_mmio.c | 24 ++++++++++++++----------
> 1 file changed, 14 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7e0cefcd16bd..fce890b6410c 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -16,6 +16,7 @@
> #include "regs/xe_bars.h"
> #include "xe_device.h"
> #include "xe_gt_sriov_vf.h"
> +#include "xe_printk.h"
> #include "xe_sriov.h"
> #include "xe_tile_printk.h"
> #include "xe_trace.h"
> @@ -80,27 +81,30 @@ int xe_mmio_probe_tiles(struct xe_device *xe)
> static void mmio_fini(void *arg)
> {
> struct xe_device *xe = arg;
> - struct xe_tile *root_tile = xe_device_get_root_tile(xe);
>
> - pci_iounmap(to_pci_dev(xe->drm.dev), xe->mmio.regs);
> xe->mmio.regs = NULL;
> - root_tile->mmio.regs = NULL;
> }
>
> +/**
> + * xe_mmio_probe_early() - Probe and initialize device's MMIO
> + * @xe: the &xe_device
> + *
> + * Map the entire GTTMMADR_BAR and initialize the first tile's MMIO instance.
> + *
> + * The first 16MB of the GTTMMADR_BAR always belongs to the root tile, and
> + * includes: registers (0-4MB), reserved space (4MB-8MB) and GGTT (8MB-16MB).
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> int xe_mmio_probe_early(struct xe_device *xe)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(xe);
> struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>
> - /*
> - * Map the entire BAR.
> - * The first 16MB of the BAR, belong to the root tile, and include:
> - * registers (0-4MB), reserved space (4MB-8MB) and GGTT (8MB-16MB).
> - */
> xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR);
> - xe->mmio.regs = pci_iomap(pdev, GTTMMADR_BAR, 0);
> + xe->mmio.regs = pcim_iomap(pdev, GTTMMADR_BAR, 0);
> if (!xe->mmio.regs) {
> - drm_err(&xe->drm, "failed to map registers\n");
> + xe_err(xe, "Failed to map GTTMMADR_BAR\n");
> return -EIO;
> }
>
next prev parent reply other threads:[~2026-06-22 15:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-22 13:23 [PATCH v3 0/6] drm/xe/mmio: Small improvements Michal Wajdeczko
2026-06-22 13:23 ` [PATCH v3 1/6] drm/xe/mmio: Verify MMIO is available Michal Wajdeczko
2026-06-22 15:39 ` Matthew Auld
2026-06-22 13:23 ` [PATCH v3 2/6] drm/xe/mmio: Map MMIO BAR using managed version of pci_iomap Michal Wajdeczko
2026-06-22 15:43 ` Matthew Auld [this message]
2026-06-22 13:23 ` [PATCH v3 3/6] drm/xe/mmio: Add check for minimal BAR size Michal Wajdeczko
2026-06-22 15:43 ` Matthew Auld
2026-06-22 13:23 ` [PATCH v3 4/6] drm/xe/mmio: Drop tiles_fini action Michal Wajdeczko
2026-06-22 15:44 ` Matthew Auld
2026-06-22 13:23 ` [PATCH v3 5/6] drm/xe/mmio: Check MMIO BAR size when initializing tiles Michal Wajdeczko
2026-06-22 13:23 ` [PATCH v3 6/6] drm/xe/mmio: Prefer tile-based WARN message Michal Wajdeczko
2026-06-23 9:13 ` Matthew Auld
2026-06-22 17:56 ` ✓ CI.KUnit: success for drm/xe/mmio: Small improvements (rev3) Patchwork
2026-06-22 18:52 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-22 23:13 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-06-23 16:47 ` Michal Wajdeczko
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