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Sat, 4 Jul 2026 07:22:31 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 X-ThreadId: A533ldWDlXLR Date: Sat, 04 Jul 2026 12:22:09 +0100 From: "Jiaxun Yang" To: "Yao Zi" , "Simon Glass" Cc: "Tom Rini" , "Heinrich Schuchardt" , "Ilias Apalodimas" , u-boot@lists.denx.de Message-Id: In-Reply-To: References: <20260701111808.870705-1-me@ziyao.cc> <20260701111808.870705-9-me@ziyao.cc> Subject: Re: [PATCH v2 08/16] LoongArch: CPU assembly routines Content-Type: text/plain Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Fri, 3 Jul 2026, at 9:12 PM, Yao Zi wrote: [...] >> >> Is the nop after idle 0 required by the ISA (to guarantee the >> wake-up completes before the load) or just padding? A >> one-line comment would help. > > I don't think such requirements exist, and LoongArch instructions are > always 4-byte so there's nothing to pad, too. This is likely > unintentionally left when re-writing the assembly, and I'll remove it > in the next version. This is carried over from Loongson's UEFI assembly. I'd rather not to touch it. Thanks > >> Regards, >> Simon > > Best regards, > Yao Zi -- - Jiaxun