Re: [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66u2g45g.

[<Tudor.Ambarus@microchip.com>]

On 7/17/20 12:16 AM, David Clear wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device which
> supports x1, x2, or x4 operation.

Please specify in the commit message if you tested this flash
and with which controller.
One should do the following tests:
- read, erase, read back, hexdump -> to verify the erase op
- generate a random file, write, read back, compare
(e.g. sha1sum) -> to verify the write/read

For locking operations one should do some locking tests.

Vignesh, maybe we'll have to update the documentation to request
these kind of tests when one adds a flash entry.

Cheers,
ta

> 
> Signed-off-by: David Clear <dac2@pensando.io>
> Acked-by: Shannon Nelson <snelson@pensando.io>
> ---
>  drivers/mtd/spi-nor/macronix.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> index 0ae0815a3633..f97f3d127575 100644
> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -87,6 +87,9 @@ static const struct flash_info macronix_parts[] = {
>                               SPI_NOR_QUAD_READ) },
>         { "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048,
>                               SPI_NOR_QUAD_READ) },
> +       { "mx66u2g45g",  INFO(0xc2253c, 0, 64 * 1024, 4096,
> +                             SECT_4K | SPI_NOR_DUAL_READ |
> +                             SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>  };
> 
>  static void macronix_default_init(struct spi_nor *nor)
> --
> 2.17.1
> 

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