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From: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>
To: <imre.deak@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
	<intel-gfx@lists.freedesktop.org>, <ankit.k.nautiyal@intel.com>,
	<chaitanya.kumar.borah@intel.com>,
	"Shankar, Uma" <uma.shankar@intel.com>
Subject: Re: [PATCH] drm/i915/dp: Fallback to DSC for HDR content if needed
Date: Wed, 16 Jul 2025 20:00:05 +0530	[thread overview]
Message-ID: <d8be62bc-d6d1-4f88-ab92-5c277a88f388@intel.com> (raw)
In-Reply-To: <aHEKIZC_KanqJTF5@ideak-desk>

+Uma

On 7/11/2025 6:27 PM, Imre Deak wrote:
> On Thu, Jul 03, 2025 at 07:32:52PM +0530, Chaitanya Kumar Borah wrote:
>> If user-space has enabled HDR by passing HDR metadata and we can't support
>> 10bpc fallback to DSC.
>>
>> Now that we need the helper to determine the presence of HDR metadata at
>> multiple places make it non static.
>>
>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c          | 16 ++++++++++++++++
>>   drivers/gpu/drm/i915/display/intel_dp.h          |  1 +
>>   .../drm/i915/display/intel_dp_aux_backlight.c    | 13 -------------
>>   3 files changed, 17 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index f48912f308df..abbba159e479 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1774,6 +1774,9 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
>>   	     bpp -= 2 * 3) {
>>   		int link_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp);
>>   
>> +		if (intel_dp_in_hdr_mode(conn_state) && bpp < 30)
>> +			return -EINVAL;
> This limit should be set in limits->pipe.min_bpp, computed already by
> this time in intel_dp_compute_config_limits().


Thank you, Imre, for pointing that out. I had a branch with this 
implementation sometime back but I was sloppy enough to lose it.
I will prepare a patch with something like this.

-       limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
+       limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 :
+  intel_dp_min_bpp(crtc_state->output_format);

But it will involve some jugglary with the arguments of 
intel_dp_dsc_compute_pipe_bpp_limits().


> Not sure though if it's
> expected that the modeset fails if DSC is not available for instance.


Now this is the tricky part. We first encountered this problem on a DRRS 
capable panel where clock is fixed at the highest mode's pixel rate.

That results in our bandwidth calculation ending up with 6bpc even at 
lower mode. Probably the mode change would go through but will cause

some horrible banding.

Fortunately, this particular panel has DSC and the fallback works. But 
as you appointed, it is a problem if the panel does not support DSC.
Only way I see to work around it, is to let go off DRRS and allow a 
modeset. But given our codeflow, I am not sure how easy it will be to 
implement such a policy.


Regards

Chaitanya


>> +
>>   		mode_rate = intel_dp_link_required(clock, link_bpp);
>>   
>>   		for (i = 0; i < intel_dp->num_common_rates; i++) {
>> @@ -2910,6 +2913,19 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
>>   	}
>>   }
>>   
>> +bool
>> +intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state)
>> +{
>> +	struct hdr_output_metadata *hdr_metadata;
>> +
>> +	if (!conn_state->hdr_output_metadata)
>> +		return false;
>> +
>> +	hdr_metadata = conn_state->hdr_output_metadata->data;
>> +
>> +	return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084;
>> +}
>> +
>>   static void
>>   intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
>>   					    struct intel_crtc_state *crtc_state,
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
>> index 0657f5681196..5def589e3c0e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> @@ -214,5 +214,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
>>   
>>   int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
>>   void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
>> +bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
>>   
>>   #endif /* __INTEL_DP_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> index 41228478b21c..12084a542fc5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> @@ -225,19 +225,6 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state,
>>   			connector->base.base.id, connector->base.name);
>>   }
>>   
>> -static bool
>> -intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state)
>> -{
>> -	struct hdr_output_metadata *hdr_metadata;
>> -
>> -	if (!conn_state->hdr_output_metadata)
>> -		return false;
>> -
>> -	hdr_metadata = conn_state->hdr_output_metadata->data;
>> -
>> -	return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084;
>> -}
>> -
>>   static void
>>   intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 level)
>>   {
>> -- 
>> 2.25.1
>>

      reply	other threads:[~2025-07-16 14:30 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-03 14:02 [PATCH] drm/i915/dp: Fallback to DSC for HDR content if needed Chaitanya Kumar Borah
2025-07-03 15:00 ` ✓ i915.CI.BAT: success for " Patchwork
2025-07-03 15:07 ` ✓ CI.KUnit: " Patchwork
2025-07-03 15:48 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-03 19:15 ` ✓ i915.CI.Full: " Patchwork
2025-07-05  3:42 ` ✗ Xe.CI.Full: failure " Patchwork
2025-07-11  4:27 ` [PATCH] " Kandpal, Suraj
2025-07-16 13:57   ` Borah, Chaitanya Kumar
2025-07-11 12:57 ` Imre Deak
2025-07-16 14:30   ` Borah, Chaitanya Kumar [this message]

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