From: Dave Jiang <dave.jiang@intel.com>
To: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
nvdimm@lists.linux.dev, linux-fsdevel@vger.kernel.org,
linux-pm@vger.kernel.org
Cc: Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Matthew Wilcox <willy@infradead.org>, Jan Kara <jack@suse.cz>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@kernel.org>,
Li Ming <ming.li@zohomail.com>,
Jeff Johnson <jeff.johnson@oss.qualcomm.com>,
Ying Huang <huang.ying.caritas@gmail.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Peter Zijlstra <peterz@infradead.org>,
Greg KH <gregkh@linuxfoundation.org>,
Nathan Fontenot <nathan.fontenot@amd.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>,
Benjamin Cheatham <benjamin.cheatham@amd.com>,
PradeepVineshReddy Kodamati <PradeepVineshReddy.Kodamati@amd.com>,
Zhijian Li <lizhijian@fujitsu.com>
Subject: Re: [PATCH v4 4/7] cxl/acpi: Add background worker to wait for cxl_pci and cxl_mem probe
Date: Tue, 3 Jun 2025 16:45:58 -0700 [thread overview]
Message-ID: <d9435456-9ae8-4fbe-a67b-e557e2787b0c@intel.com> (raw)
In-Reply-To: <20250603221949.53272-5-Smita.KoralahalliChannabasappa@amd.com>
On 6/3/25 3:19 PM, Smita Koralahalli wrote:
> Introduce a waitqueue mechanism to coordinate initialization between the
> cxl_pci and cxl_mem drivers.
>
> Launch a background worker from cxl_acpi_probe() that waits for both
> drivers to complete initialization before invoking wait_for_device_probe().
> Without this, the probe completion wait could begin prematurely, before
> the drivers are present, leading to missed updates.
>
> Co-developed-by: Nathan Fontenot <Nathan.Fontenot@amd.com>
> Signed-off-by: Nathan Fontenot <Nathan.Fontenot@amd.com>
> Co-developed-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> ---
> drivers/cxl/acpi.c | 23 +++++++++++++++++++++++
> drivers/cxl/core/suspend.c | 21 +++++++++++++++++++++
> drivers/cxl/cxl.h | 2 ++
> 3 files changed, 46 insertions(+)
>
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index cb14829bb9be..978f63b32b41 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -813,6 +813,24 @@ static int pair_cxl_resource(struct device *dev, void *data)
> return 0;
> }
>
> +static void cxl_softreserv_mem_work_fn(struct work_struct *work)
> +{
> + /* Wait for cxl_pci and cxl_mem drivers to load */
> + cxl_wait_for_pci_mem();
> +
> + /*
> + * Wait for the driver probe routines to complete after cxl_pci
> + * and cxl_mem drivers are loaded.
> + */
> + wait_for_device_probe();
> +}
> +static DECLARE_WORK(cxl_sr_work, cxl_softreserv_mem_work_fn);
> +
> +static void cxl_softreserv_mem_update(void)
> +{
> + schedule_work(&cxl_sr_work);
> +}
> +
> static int cxl_acpi_probe(struct platform_device *pdev)
> {
> int rc;
> @@ -887,6 +905,10 @@ static int cxl_acpi_probe(struct platform_device *pdev)
>
> /* In case PCI is scanned before ACPI re-trigger memdev attach */
> cxl_bus_rescan();
> +
> + /* Update SOFT RESERVE resources that intersect with CXL regions */
> + cxl_softreserv_mem_update();
> +
> return 0;
> }
>
> @@ -918,6 +940,7 @@ static int __init cxl_acpi_init(void)
>
> static void __exit cxl_acpi_exit(void)
> {
> + cancel_work_sync(&cxl_sr_work);
> platform_driver_unregister(&cxl_acpi_driver);
> cxl_bus_drain();
> }
> diff --git a/drivers/cxl/core/suspend.c b/drivers/cxl/core/suspend.c
> index 72818a2c8ec8..c0d8f70aed56 100644
> --- a/drivers/cxl/core/suspend.c
> +++ b/drivers/cxl/core/suspend.c
> @@ -2,12 +2,15 @@
> /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
> #include <linux/atomic.h>
> #include <linux/export.h>
> +#include <linux/wait.h>
> #include "cxlmem.h"
> #include "cxlpci.h"
>
> static atomic_t mem_active;
> static atomic_t pci_loaded;
>
> +static DECLARE_WAIT_QUEUE_HEAD(cxl_wait_queue);
> +
> bool cxl_mem_active(void)
> {
> if (IS_ENABLED(CONFIG_CXL_MEM))
> @@ -19,6 +22,7 @@ bool cxl_mem_active(void)
> void cxl_mem_active_inc(void)
> {
> atomic_inc(&mem_active);
> + wake_up(&cxl_wait_queue);
> }
> EXPORT_SYMBOL_NS_GPL(cxl_mem_active_inc, "CXL");
>
> @@ -28,8 +32,25 @@ void cxl_mem_active_dec(void)
> }
> EXPORT_SYMBOL_NS_GPL(cxl_mem_active_dec, "CXL");
>
> +static bool cxl_pci_loaded(void)
> +{
> + if (IS_ENABLED(CONFIG_CXL_PCI))
> + return atomic_read(&pci_loaded) != 0;
> +
> + return false;
> +}
> +
> void mark_cxl_pci_loaded(void)
> {
> atomic_inc(&pci_loaded);
> + wake_up(&cxl_wait_queue);
> }
> EXPORT_SYMBOL_NS_GPL(mark_cxl_pci_loaded, "CXL");
> +
> +void cxl_wait_for_pci_mem(void)
> +{
> + if (!wait_event_timeout(cxl_wait_queue, cxl_pci_loaded() &&
> + cxl_mem_active(), 30 * HZ))
I'm trying to understand why cxl_pci_loaded() is needed. cxl_mem_active() goes above 0 when a cxl_mem_probe() instance succeeds. cxl_mem_probe() being triggered implies that an instance of cxl_pci_probe() has been called since cxl_mem_probe() is triggered from devm_cxl_add_memdev() with memdev being added and cxl_mem driver also have been loaded. So does cxl_mem_active() not imply cxl_pci_loaded() and makes it unnecessary?
DJ
> + pr_debug("Timeout waiting for cxl_pci or cxl_mem probing\n");
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_wait_for_pci_mem, "CXL");
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index a9ab46eb0610..1ba7d39c2991 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -902,6 +902,8 @@ void cxl_coordinates_combine(struct access_coordinate *out,
>
> bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port);
>
> +void cxl_wait_for_pci_mem(void);
> +
> /*
> * Unit test builds overrides this to __weak, find the 'strong' version
> * of these symbols in tools/testing/cxl/.
next prev parent reply other threads:[~2025-06-03 23:46 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-03 22:19 [PATCH v4 0/7] Add managed SOFT RESERVE resource handling Smita Koralahalli
2025-06-03 22:19 ` [PATCH v4 1/7] cxl/region: Avoid null pointer dereference in is_cxl_region() Smita Koralahalli
2025-06-03 23:49 ` Dave Jiang
2025-06-04 19:56 ` Nathan Fontenot
2025-06-25 15:23 ` Robert Richter
2025-06-03 22:19 ` [PATCH v4 2/7] cxl/core: Remove CONFIG_CXL_SUSPEND and always build suspend.o Smita Koralahalli
2025-06-09 11:02 ` Jonathan Cameron
2025-06-09 23:25 ` Koralahalli Channabasappa, Smita
2025-06-10 9:38 ` Jonathan Cameron
2025-06-03 22:19 ` [PATCH v4 3/7] cxl/pci: Add pci_loaded tracking to mark PCI driver readiness Smita Koralahalli
2025-06-04 9:29 ` Zhijian Li (Fujitsu)
2025-06-03 22:19 ` [PATCH v4 4/7] cxl/acpi: Add background worker to wait for cxl_pci and cxl_mem probe Smita Koralahalli
2025-06-03 23:45 ` Dave Jiang [this message]
2025-06-04 18:31 ` Koralahalli Channabasappa, Smita
2025-06-04 9:40 ` Zhijian Li (Fujitsu)
2025-06-04 14:35 ` Dave Jiang
2025-06-05 2:18 ` Zhijian Li (Fujitsu)
2025-06-03 22:19 ` [PATCH v4 5/7] cxl/region: Introduce SOFT RESERVED resource removal on region teardown Smita Koralahalli
2025-06-06 4:16 ` Zhijian Li (Fujitsu)
2025-06-06 17:53 ` Koralahalli Channabasappa, Smita
2025-06-09 12:54 ` Jonathan Cameron
2025-06-10 1:25 ` Koralahalli Channabasappa, Smita
2025-06-10 9:37 ` Jonathan Cameron
2025-06-25 15:20 ` Robert Richter
2025-07-09 1:14 ` Alison Schofield
2025-06-03 22:19 ` [PATCH v4 6/7] dax/hmem: Save the DAX HMEM platform device pointer Smita Koralahalli
2025-06-05 16:54 ` Dave Jiang
2025-06-06 8:11 ` Zhijian Li (Fujitsu)
2025-06-06 20:09 ` Nathan Fontenot
2025-06-03 22:19 ` [PATCH v4 7/7] cxl/dax: Defer DAX consumption of SOFT RESERVED resources until after CXL region creation Smita Koralahalli
2025-06-09 13:01 ` Jonathan Cameron
2025-06-13 2:12 ` Zhijian Li (Fujitsu)
2025-07-10 4:22 ` Koralahalli Channabasappa, Smita
2025-07-10 8:18 ` Zhijian Li (Fujitsu)
2025-07-15 16:27 ` Alison Schofield
2025-07-15 18:19 ` Koralahalli Channabasappa, Smita
2025-07-15 18:45 ` Alison Schofield
2025-06-04 8:43 ` [PATCH v4 0/7] Add managed SOFT RESERVE resource handling Zhijian Li (Fujitsu)
2025-06-04 18:59 ` Koralahalli Channabasappa, Smita
2025-06-16 1:00 ` Zhijian Li (Fujitsu)
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