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Wed, 29 Jan 2025 02:19:36 -0800 (PST) Message-ID: Date: Wed, 29 Jan 2025 11:19:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.20 1/2] x86/shutdown: quiesce devices ahead of AP shutdown From: Jan Beulich To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250128162742.90431-1-roger.pau@citrix.com> <20250128162742.90431-2-roger.pau@citrix.com> <9673c95f-7ee6-461c-8678-46aeab55735a@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <9673c95f-7ee6-461c-8678-46aeab55735a@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.01.2025 11:13, Jan Beulich wrote: > On 28.01.2025 17:27, Roger Pau Monne wrote: >> The current shutdown logic in smp_send_stop() will first disable the APs, >> and then attempt to disable (some) of the interrupt sources. >> >> There are two issues with this approach; the first one being that MSI >> interrupt sources are not disabled, the second one is the APs are stopped >> before interrupts are disabled. On AMD systems this can lead to the >> triggering of local APIC errors: >> >> APIC error on CPU0: 00(08), Receive accept error >> >> Such error message can be printed in a loop, thus blocking the system from >> rebooting. I assume this loop is created by the error being triggered by >> the console interrupt, which is further triggered by the ESR reporting >> write to the console. >> >> Intel SDM states: >> >> "Receive Accept Error. >> >> Set when the local APIC detects that the message it received was not >> accepted by any APIC on the APIC bus, including itself. Used only on P6 >> family and Pentium processors." >> >> So the error shouldn't trigger on any Intel CPU supported by Xen. >> >> However AMD doesn't make such claims, and indeed the error is broadcasted >> to all local APIC when for example an interrupt targets a CPU that's >> offline. >> >> To prevent the error from triggering, move the masking of IO-APIC pins >> ahead of stopping the APs. Also introduce a new function that disables >> MSI and MSI-X on all PCI devices. Remove the call to fixup_irqs() since >> there's no point in attempting to move interrupts: all sources will be >> either masked or disabled. >> >> For the NMI crash path also call the newly introduced function, with the >> hope that disabling MSI and MSI-X will make it easier for the (possible) >> crash kernel to boot, as it could otherwise receive the same "Receive >> accept error" upon re-enabling interrupts. >> >> Note that this will have the side-effect of preventing further IOMMU >> interrupts from being delivered, that's expected and at that point in the >> shutdown process no further interaction with the IOMMU should be relevant. > > This is at most for AMD only. Shouldn't we similarly disable VT-d's > interrupt(s)? (It's only one right now, as we still don't use the QI > completion one.) Even for AMD I'm uncertain: It has separate > hw_irq_controller instances, and its set_iommu_interrupt_handler() is > custom as well. Will pci_disable_msi_all() really affect it? (Hmm, > yes, from amd_iommu_msi_enable() it looks like it will.) Oh, no - not for the x2APIC case. There it's solely iommu->ctrl.int_cap_xt_en which controls whether the interrupt is enabled, iirc. Btw, one of the two calls from enable_iommu() to amd_iommu_msi_enable() is actually wrong (commit d9e49d1afe2e should have moved it instead of adding another call); I'll make a patch for that. Jan