Re: [PATCH] sparc: populate sysfs cache topology information on sun4v

[Tony Rodriguez <unixpro1970@gmail.com>]

On 10/26/26 11:52 AM, Tony Rodriguez wrote:
> Tested-by: Tony Rodriguez <unixpro1970@gmail.com>
>
> Tested on both SPARC T7-1 and S7-2 systems; the lscpu output is correct on both.
>
> A) T7-1:
> A1) lscpu
> Architecture:          sparc64
>    CPU op-mode(s):      32-bit, 64-bit
>    Byte Order:          Big Endian
> CPU(s):                256
>    On-line CPU(s) list: 0-255
> Model name:            SPARC-M7
>    Thread(s) per core:  8
>    Core(s) per socket:  32
>    Socket(s):           1
>    Flags:               sun4v
> Caches (sum of all):
>    L1d:                 512 KiB (32 instances)
>    L1i:                 512 KiB (32 instances)
>    L2d:                 4 MiB (16 instances)
>    L2i:                 2 MiB (8 instances)
>    L3:                  64 MiB (8 instances)
> NUMA:
>    NUMA node(s):        1
>    NUMA node0 CPU(s):   0-255
>
> A2) lscpu --cache
> NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
> L1d       16K     512K    4 Data            1   128                      32
> L1i       16K     512K    4 Instruction     1    64                      64
> L2d      256K       4M    8 Data            2   512                      64
> L2i      256K       2M    8 Instruction     2   512                      64
> L3         8M      64M    8 Unified         3 16384                      64
>
> B) S7-2:
> B1) lscpu
> Architecture:          sparc64
>    CPU op-mode(s):      32-bit, 64-bit
>    Byte Order:          Big Endian
> CPU(s):                128
>    On-line CPU(s) list: 0-127
> Model name:            SPARC-S7 (Sonoma)
>    Thread(s) per core:  8
>    Core(s) per socket:  8
>    Socket(s):           2
>    Flags:               sun4v
> Caches (sum of all):
>    L1d:                 256 KiB (16 instances)
>    L1i:                 256 KiB (16 instances)
>    L2d:                 2 MiB (8 instances)
>    L2i:                 1 MiB (4 instances)
>    L3:                  32 MiB (4 instances)
> NUMA:
>    NUMA node(s):        2
>    NUMA node0 CPU(s):   0-63
>    NUMA node1 CPU(s):   64-127
>
> B2) lscpu --cache
> NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
> L1d       16K     256K    4 Data            1   128                      32
> L1i       16K     256K    4 Instruction     1    64                      64
> L2d      256K       2M    8 Data            2   512                      64
> L2i      256K       1M    8 Instruction     2   512                      64
> L3         8M      32M    8 Unified         3 16384                      64

Corrected the lscpu --cache output to fix the PHY-LINE and 
COHERENCY-SIZE fields, making the output easier to read in the email.