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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?qUO4g8cEUhr2ZsFpMqcZOAjL2XHt2obOiagnLchfCaQXNTgFCZHMU0zqqXKX?= =?us-ascii?Q?T0mRbWiU83Z7CW4tIfo1kun40mSNAtfrYl27G6X3DuXbdfLQL0Yk+UvDkrnK?= =?us-ascii?Q?PUWQSzgVFM0yA4k2iqKDz4Xzd+ITVuGNwUQ3KkgX8XwT0ETxlK354xwpJWwi?= =?us-ascii?Q?2ycPevI8RGnhfsS89RALkPpAKYSZwEgAiTTNrOuuXap5FJ0DTrtZhiNM1t2N?= =?us-ascii?Q?UuLbrT+oKPttICUA0DGcakdeh7JQmcMaSw3vceorRvK0C2w1pBJJOmmgBuht?= =?us-ascii?Q?F3ApELOgvXxzKFht0s7UoroFunb13hbmZl6ikrJD398/p1fFuKjpb4XftZHh?= =?us-ascii?Q?2B2LpVus9BMxkbQW34ZZ05b+0PfincpsWuXBnaaNjj618UWTCAKRYTnIpdYa?= =?us-ascii?Q?mhqIyL4uxTNWasyyODEZGSUHbwCBpWoh7r1qb75eh7sYr23lie7PhlDTHjf8?= =?us-ascii?Q?/YxoaLIEypAhhC+pioAJI/qQzFMN7BkXMUklcs7oQxkr1VAw392PnnGoOAFw?= =?us-ascii?Q?/0Zh5Esdd/u2CyB6u0yi82b5NEffencQZ3mD6HV+2xAE8e1heUyBPghKCfqt?= =?us-ascii?Q?hqEWLjtEGUUloW71gi6D0gfUflF4jhZUvP5K+G+fwlOXcAH8gJLXiOGWTtfS?= =?us-ascii?Q?KpAxkWwfmPa2Yj4GBTwuIGNoM9YE1ABjxWpg4pu1QdPbRAUaifZSsiqfwsp+?= =?us-ascii?Q?HBkGpxyQHcBHMikV4iJA17PiCyDYI63gbV3Ij4+b0zFVZQehdX2LY53p50An?= =?us-ascii?Q?VECnqqpvkvjaaSe5S/+VEfWZfGjOrZQKdtqNYL97MctvzPncjEEcpNpERovv?= =?us-ascii?Q?QpQChgD4ihvBPOw9Wc2kJxEdta1H+/XD9K1Fiw20uqVqvnivVVN8HMXahiiX?= =?us-ascii?Q?K/4drBP6tlhpSIjJ55Tpqq4E/El6yhKnC9E6Cxot6byNT33OGIDhHt6HLvvJ?= =?us-ascii?Q?onCAn++C+GzkiNT8gkOFVvvXbG1pzy5fCHqjsrPKyOJARLgRL6afP+KRTUqV?= =?us-ascii?Q?GCDx5srAQzrIKHHVo4u4NuxYUNkXmSniP+KWicpRE+bWq4hbB+juOCj2g6Ts?= =?us-ascii?Q?nYe5H2jGP2kX2xFFaQxJL6h8c7oF+5RlyF5Txn8plu7Eh2pL0GzxKSYMmX5H?= =?us-ascii?Q?L4fVJoL3Rq2HolhgJEdZYDKpWYuHgK4fdsG1IMgx0DKEEjUoGtCfgbXEZbyz?= =?us-ascii?Q?TFYAs+eAlPUYTwiLl1IDIPm1OBpD6W9ffb2QlU2uVy2EOQq2+ByUXlPAfODj?= =?us-ascii?Q?h94csXUoklRakOtEd6ZL8194e0ZG27l2yZU+gI7uGoE0qmDh0HOpjDUgzaX5?= =?us-ascii?Q?8g/dcLm9Nh4qPXTkmDUG6qEyRAIss4RIMloFgp2NBrzfnsEnimuhxTN+Rjam?= =?us-ascii?Q?6gbyARJgdVnKxqxHXrevT84Wa5gITOJOSZob4TefIOS7eBXcOn24ZhsBVJw0?= =?us-ascii?Q?hZ8UoYBal/4JVyksKo3G2D43ogq+ylXMwye1fVs620OvNkv2qhXCcn4R4LOr?= =?us-ascii?Q?P/Zd1sLVXyC2KXmyIlVRrNcUfoFf975cmmRWtuth7fx8pPUbMZsb7Q/iPMf6?= =?us-ascii?Q?0RPqU3gubgD8ZNbcpQfb5J3DG7B59VFrGfRJ4b47tIrlv770kbeOGUN+SPXM?= =?us-ascii?Q?gXiqeZ2avKNjXhFJEXhbbZg=3D?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 43b30591-90f7-48ee-7d4b-08d99de95f0a X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5600.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2021 10:13:09.8358 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +mAvKuXbNMXYDVQzSe8QDngkf0rmxOSo27frF0anUxwt80luegNU7rQA//d9WLLchCVl8LpjMBihOW7fUPOw5A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5598 On 25.10.2021 12:28, Roger Pau Monn=C3=A9 wrote: > On Thu, Oct 21, 2021 at 11:59:02AM +0200, Jan Beulich wrote: >> The two are really meant to be independent settings; iov_supports_xt() >> using || instead of && was simply wrong. The corrected check is, >> however, redundant, just like the (correct) one in iov_detect(): These >> hook functions are unreachable without acpi_ivrs_init() installing the >> iommu_init_ops pointer, which it does only upon success. (Unlike for >> VT-d there is no late clearing of iommu_enable due to quirks, and any >> possible clearing of iommu_intremap happens only after iov_supports_xt() >> has run.) >> >> Signed-off-by: Jan Beulich >> --- >> In fact in iov_detect() it could be iommu_enable alone which gets >> checked, but this felt overly aggressive to me. Instead I'm getting the >> impression that the function may wrongly not get called when "iommu=3Dof= f" >> but interrupt remapping is in use: We'd not get the interrupt handler >> installed, and hence interrupt remapping related events would never get >> reported. (Same on VT-d, FTAOD.) >=20 > I've spend a non-trivial amount of time looking into this before > reading this note. AFAICT you could set iommu=3Doff and still get x2APIC > enabled and relying on interrupt remapping. Right, contrary to ... >> For iov_supports_xt() the question is whether, like VT-d's >> intel_iommu_supports_eim(), it shouldn't rather check iommu_intremap >> alone (in which case it would need to remain a check rather than getting >> converted to ASSERT()). >=20 > Hm, no, I don't think so. I think iommu_enable should take precedence > over iommu_intremap, and having iommu_enable =3D=3D false should force > interrupt remapping to be reported as disabled. Note that disabling it > in iommu_setup is too late, as the APIC initialization will have > already taken place. >=20 > It's my reading of the command line parameter documentation that > setting iommu=3Doff should disable all usage of the IOMMU, and that > includes the interrupt remapping support (ie: a user should not need > to set iommu=3Doff,no-intremap) ... that documentation. But I think it's the documentation that wants fixing, such that iommu=3Doff really only control DMA remap. With that ... >> --- >> v2: New. >> >> --- a/xen/drivers/passthrough/amd/iommu_intr.c >> +++ b/xen/drivers/passthrough/amd/iommu_intr.c >> @@ -731,8 +731,7 @@ bool __init iov_supports_xt(void) >> { >> unsigned int apic; >> =20 >> - if ( !iommu_enable || !iommu_intremap ) >> - return false; >> + ASSERT(iommu_enable || iommu_intremap); >=20 > I think this should be && in order to match my comments above. ... I think || is correct to use here. Jan