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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eb6d6ebf0sm35183885f8f.34.2026.05.26.02.46.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 May 2026 02:46:57 -0700 (PDT) Message-ID: Date: Tue, 26 May 2026 11:46:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 06/14] target-info: Add target_riscv64() Content-Language: en-US To: Chao Liu , Anton Johansson Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, pierrick.bouvier@oss.qualcomm.com, palmer@dabbelt.com, alistair.francis@wdc.com References: <20260520-hw-riscv-cpu-int-v3-0-d1123ea63d9c@rev.ng> <20260520-hw-riscv-cpu-int-v3-6-d1123ea63d9c@rev.ng> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=philmd@linaro.org; helo=mail-wm1-x341.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 21/5/26 10:19, Chao Liu wrote: > On Wed, May 20, 2026 at 03:12:58PM +0800, Anton Johansson via wrote: >> Adds a helper function to tell if the binary is targeting riscv64 or >> not. >> >> Reviewed-by: Pierrick Bouvier >> Signed-off-by: Anton Johansson >> --- >> include/qemu/target-info.h | 7 +++++++ >> target-info.c | 5 +++++ >> 2 files changed, 12 insertions(+) >> >> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h >> index 23c997de54..6c5b714288 100644 >> --- a/include/qemu/target-info.h >> +++ b/include/qemu/target-info.h >> @@ -99,4 +99,11 @@ bool target_ppc64(void); >> */ >> bool target_s390x(void); >> >> +/** > There’s one extra * character here; otherwise LGTM. This is the Javadoc tag which is also used by C tools such doxygen: https://www.doxygen.nl/manual/docblocks.html#cppblock We use sphinx with a kerneldoc.py plugin which understands it: https://www.kernel.org/doc/Documentation/doc-guide/kernel-doc.rst i.e. https://www.qemu.org/docs/master/devel/index-api.html > > Reviewed-by: Chao Liu > > Thanks, > Chao >> + * target_riscv64: >> + * >> + * Returns whether the target architecture is riscv64 >> + */ >> +bool target_riscv64(void); >> + >> #endif >> diff --git a/target-info.c b/target-info.c >> index 28c458fc7a..04c69c41f8 100644 >> --- a/target-info.c >> +++ b/target-info.c >> @@ -93,3 +93,8 @@ bool target_s390x(void) >> { >> return target_arch() == SYS_EMU_TARGET_S390X; >> } >> + >> +bool target_riscv64(void) >> +{ >> + return target_arch() == SYS_EMU_TARGET_RISCV64; >> +} >> >> -- >> 2.52.0 >> >>