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charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.08.2024 19:44, Conor Dooley wrote: > On Thu, Aug 22, 2024 at 05:42:57PM +0100, Conor Dooley wrote: >> On Thu, Aug 22, 2024 at 06:27:47PM +0300, Claudiu wrote: >>> From: Claudiu Beznea >>> >>> The RZ/G3S System controller has registers to control signals that need >>> to be de-asserted/asserted before/after different SoC areas are power >>> on/off. This signals are implemented as reset signals. For this document >>> the #reset-cells property. >>> >>> Signed-off-by: Claudiu Beznea >>> --- >>> .../bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 16 ++++++++++++++++ >>> 1 file changed, 16 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> index 4386b2c3fa4d..6b0bb34485d9 100644 >>> --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> @@ -42,12 +42,28 @@ properties: >>> - const: cm33stbyr_int >>> - const: ca55_deny >>> >>> + "#reset-cells": >>> + const: 1 >>> + >>> required: >>> - compatible >>> - reg >>> >>> additionalProperties: false >>> >>> +allOf: >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + const: renesas,r9a08g045-sysc >>> + then: >>> + required: >>> + - "#reset-cells" >> >> Given this is new required property on an existing platform, I'd expect >> some mention of why it used to be okay to not have this but is now >> required. Did firmware or a bootloader stage take things out of reset? > > Reading a bit more into the series, the peripherals in question were > just never used nor did a driver for the sysc exist, so there's neither Exactly. > explanation of prior behaviour nor concerns about compatibility? The newly introduced sysc driver is probed only for RZ/G3S and used to control the USB, PCIe signals though reset control driver (registered by sysc driver on auxiliary bus) and to identify the chip. The intention is to later migrate the chip identification support for the rest of RZ/G2 devices to this new driver and add more functionalities, when/if needed. Thank you, Claudiu Beznea > >> >>> + else: >>> + properties: >>> + "#reset-cells": false >>> + >>> examples: >>> - | >>> #include >>> -- >>> 2.39.2 >>> > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39331C52D7C for ; Fri, 23 Aug 2024 08:00:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 23 Aug 2024 00:59:42 -0700 (PDT) Message-ID: Date: Fri, 23 Aug 2024 10:59:39 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/16] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add #reset-cells for RZ/G3S Content-Language: en-US To: Conor Dooley Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, geert+renesas@glider.be, magnus.damm@gmail.com, gregkh@linuxfoundation.org, mturquette@baylibre.com, sboyd@kernel.org, yoshihiro.shimoda.uh@renesas.com, biju.das.jz@bp.renesas.com, ulf.hansson@linaro.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Claudiu Beznea References: <20240822152801.602318-1-claudiu.beznea.uj@bp.renesas.com> <20240822152801.602318-3-claudiu.beznea.uj@bp.renesas.com> <20240822-vanilla-enigmatic-f0b05ecca4b6@spud> <20240822-mountain-hurdle-dd1f08b96f64@spud> From: claudiu beznea In-Reply-To: <20240822-mountain-hurdle-dd1f08b96f64@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240823_005944_678781_8405EAD7 X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 22.08.2024 19:44, Conor Dooley wrote: > On Thu, Aug 22, 2024 at 05:42:57PM +0100, Conor Dooley wrote: >> On Thu, Aug 22, 2024 at 06:27:47PM +0300, Claudiu wrote: >>> From: Claudiu Beznea >>> >>> The RZ/G3S System controller has registers to control signals that need >>> to be de-asserted/asserted before/after different SoC areas are power >>> on/off. This signals are implemented as reset signals. For this document >>> the #reset-cells property. >>> >>> Signed-off-by: Claudiu Beznea >>> --- >>> .../bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 16 ++++++++++++++++ >>> 1 file changed, 16 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> index 4386b2c3fa4d..6b0bb34485d9 100644 >>> --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml >>> @@ -42,12 +42,28 @@ properties: >>> - const: cm33stbyr_int >>> - const: ca55_deny >>> >>> + "#reset-cells": >>> + const: 1 >>> + >>> required: >>> - compatible >>> - reg >>> >>> additionalProperties: false >>> >>> +allOf: >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + const: renesas,r9a08g045-sysc >>> + then: >>> + required: >>> + - "#reset-cells" >> >> Given this is new required property on an existing platform, I'd expect >> some mention of why it used to be okay to not have this but is now >> required. Did firmware or a bootloader stage take things out of reset? > > Reading a bit more into the series, the peripherals in question were > just never used nor did a driver for the sysc exist, so there's neither Exactly. > explanation of prior behaviour nor concerns about compatibility? The newly introduced sysc driver is probed only for RZ/G3S and used to control the USB, PCIe signals though reset control driver (registered by sysc driver on auxiliary bus) and to identify the chip. The intention is to later migrate the chip identification support for the rest of RZ/G2 devices to this new driver and add more functionalities, when/if needed. Thank you, Claudiu Beznea > >> >>> + else: >>> + properties: >>> + "#reset-cells": false >>> + >>> examples: >>> - | >>> #include >>> -- >>> 2.39.2 >>> > > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy