From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 37/37] drm/i915: dump registers read/write ops Date: Thu, 22 Mar 2012 11:15:39 +0000 Message-ID: References: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> <1332378612-3814-38-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id D53189E761 for ; Thu, 22 Mar 2012 04:15:42 -0700 (PDT) In-Reply-To: <1332378612-3814-38-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org On Wed, 21 Mar 2012 22:10:12 -0300, Eugeni Dodonov wrote: > This logs all the registers and SBI accesses as they happen. > > Note that it is not supposed to go into the final patch series. But there > are too many subtle changes in both HSW and LPT that are much easier to > spot with this extra debugging when attaching a dmesg output in case of > problems. > > In other words, this is ugly, but if you run into an issue and send me > dmesg with those included, my chances of investigating the problems will > increase exponentially. This should already by covered by the tracepoints. I guess you just lacked the magic patch to enable ftrace on module load. 1289311867-10096-1-git-send-email-chris@chris-wilson.co.uk I was hoping that since Steven Rostedt agreed and seemed to convince Rusty as well, he would pick it up... So it could do with some love. -Chris -- Chris Wilson, Intel Open Source Technology Centre