From: Jan Beulich <jbeulich@suse.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Julien Grall" <julien@xen.org>,
"Roger Pau Monné" <roger@xenproject.org>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Connor Davis" <connojdavis@gmail.com>,
"Oleksii Kurochko" <oleksii.kurochko@gmail.com>,
"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v6 1/4] xen/riscv: probe the PTE A/D bits update scheme at boot
Date: Thu, 15 Oct 2026 10:44:56 +0200 [thread overview]
Message-ID: <e1d27ef8-ecc8-4010-b570-2d2c2af89368@suse.com> (raw)
In-Reply-To: <7f5da80c-424f-49dc-8ce3-10ca2fae9f55@suse.com>
On 15.10.2026 10:41, Jan Beulich wrote:
> On 15.10.2026 10:28, Baptiste Le Duc wrote:
>> On 2026-10-15 09:14 +0200, Jan Beulich wrote:
>>> On 14.10.2026 18:45, Baptiste Le Duc wrote:
>>>> On 2026-10-14 11:09:58+02:00, Jan Beulich wrote:
>>>>> On 14.10.2026 11:00, Baptiste Le Duc wrote:
>>>>>
>>>>> In which case it would need to be
>>>>>
>>>>> if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svade) ||
>>>>> !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svadu) )
>>>>> e->pte |= PTE_ACCESSED | PTE_DIRTY;
>>>>>
>>>>> albeit I have to admit that permitting two contradicting extensions to
>>>>> be exposed at the same time is irritating.
>>>>>
>>>>>> I see two ways to address this:
>>>>>>
>>>>>> 1) Keep checking Svade:
>>>>>>
>>>>>> if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svade) )
>>>>>> e->pte |= PTE_ACCESSED | PTE_DIRTY;
>>>>>>
>>>>>> After resolve_ad_scheme(), the Svade bit is set in every case where
>>>>>> software has to preset the A/D bits. The only imprecise case is both
>>>>>> extensions advertised with hardware updating already enabled by
>>>>>> firmware, where presetting A/D is unnecessary but harmless.
>>>>>>
>>>>>> 2) Record the probe result in a global, e.g.
>>>>>>
>>>>>> static bool __ro_after_init hw_ad_update;
>>>>>>
>>>>>> and use:
>>>>>>
>>>>>> if ( !hw_ad_update )
>>>>>> e->pte |= PTE_ACCESSED | PTE_DIRTY;
>>>>>>
>>>>>> This is exact in all cases, at the cost of a new global that mostly
>>>>>> duplicates what resolve_ad_scheme() already records in the ISA bitmap.
>>>>>>
>>>>>> I discussed with Oleksii and we are fine with either. What do you prefer?
>>>>>
>>>>> As to 1), see above. For 2), while maybe okay, I think we're better off
>>>> Sorry, I don't fully follow the issue with 1). Compared to what you proposed,
>>>> it only differs when neither Svade nor Svadu is recorded, which cannot
>>>> happen as resolve_ad_scheme() runs before and always records one of the
>>>> two.
>>>
>>> Yet previously we said that recording extensions (as such, i.e. later also
>>> possibly exposing them to guests) when they weren't really advertised may
>>> not be the right thing to do. I.e. imo the probing may be used to drive
>> But we also said that platforms (such as the P550) may implement an
>> extension without advertising it, as a RISC-V spec maintainer
>> confirmed in [1].
>>
>> [1] https://github.com/riscv/riscv-isa-manual/issues/3450#issuecomment-6076851535
>
> What Andrew says there suggests to me that the behavior you observe on P550
> is against the spec.
Or wait - no, he doesn't. He said this only to the strange combination you had
indicated.
Jan
next prev parent reply other threads:[~2026-10-15 8:45 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-13 10:05 [PATCH v6 0/4] xen/riscv: fix boot on missing extensions and MMU setup bugs Baptiste Le Duc
2026-10-13 10:07 ` [PATCH v6 1/4] xen/riscv: probe the PTE A/D bits update scheme at boot Baptiste Le Duc
2026-10-13 10:36 ` Jan Beulich
2026-10-13 11:57 ` Baptiste Le Duc
2026-10-13 15:24 ` Jan Beulich
2026-10-14 8:08 ` Oleksii Kurochko
2026-10-13 14:32 ` Baptiste Le Duc
2026-10-13 15:27 ` Jan Beulich
2026-10-14 9:00 ` Baptiste Le Duc
2026-10-14 9:09 ` Jan Beulich
2026-10-14 9:54 ` Oleksii Kurochko
2026-10-14 16:45 ` Baptiste Le Duc
2026-10-15 7:14 ` Jan Beulich
2026-10-15 8:28 ` Baptiste Le Duc
2026-10-15 8:41 ` Jan Beulich
2026-10-15 8:44 ` Jan Beulich [this message]
2026-10-15 8:59 ` Baptiste Le Duc
2026-10-15 15:31 ` Oleksii Kurochko
2026-10-15 15:38 ` Oleksii Kurochko
2026-10-15 16:04 ` Jan Beulich
2026-10-14 9:03 ` Oleksii Kurochko
2026-10-13 10:07 ` [PATCH v6 2/4] xen/riscv: rework the A/D bits comment in p2m_set_pte_flags() Baptiste Le Duc
2026-10-13 10:07 ` [PATCH v6 3/4] xen/riscv: fix A/D bits in Xen's page-table mappings Baptiste Le Duc
2026-10-13 10:43 ` Jan Beulich
2026-10-13 12:02 ` Baptiste Le Duc
2026-10-14 9:59 ` Oleksii Kurochko
2026-10-14 14:53 ` Baptiste Le Duc
2026-10-13 10:07 ` [PATCH v6 4/4] xen/riscv: use pte_is_valid() in pte_is_mapping() Baptiste Le Duc
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