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envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 17/06/26 3:20 pm, Saif Abrar wrote: > Hello, > This patchset resolves the review comments for v4: > https://lore.kernel.org/qemu-devel/20260305060923.3753402-1-saif.abrar@linux.vnet.ibm.com/ > > Thanks to all the reviewers for their efforts. > > Major updates include the following: > - Rename to phb5. > - New file for common definitions used in tests/qtest/pnv-* files. > - Initializing PnvPHB4Class members within class_init method. > - Updated IODA3 PCT table max size to 128, each with 2 entries. > - Multiple general cleanups. > > Tested with 'make check-qtest' , 'make check-functional-ppc64' and 'make check'. Thanks Saif for addressing the review comments from reviews on v4. I see you have also included Rb (Reviewed-by) tags from folks who gave review comments on v4, but (at least me) didn't give Rb explicitly after seeing the review comments addressed. We should add Rb only once the reviewer explicitly provides it. Also, could you please rebase this patchset on top of below PHB 4/5 refactoring patch from Jishnu: https://lore.kernel.org/qemu-devel/20260608093430.2729688-1-jishnuvw@linux.ibm.com/ While I do not have any additional major review comments, I will let other reviewers provide any additional feedback or Rb as appropriate. regards, Harsh > > Regards. > > Saif Abrar (9): > qtest/phb5: Add testbench for PHB > pnv/phb5: Add reset logic to PHB5 > pnv/phb5: Implement sticky reset logic in PHB5 > pnv/phb5: Implement read-only and write-only bits of registers > pnv/phb5: Implement write-clear and return 1's on unimplemented reg > read > pnv/phb5: Set link-active status in HPSTAT and LMR registers > pnv/phb5: Set link speed and width in the DLP training control > register > pnv/phb5: Implement IODA PCT table > pnv/phb5: Mask off LSI Source-ID based on number of interrupts > > hw/pci-host/pnv_phb.c | 1 + > hw/pci-host/pnv_phb4.c | 581 +++++++++++++++++++++++++--- > include/hw/pci-host/pnv_phb4.h | 16 +- > include/hw/pci-host/pnv_phb4_regs.h | 66 +++- > tests/qtest/meson.build | 1 + > tests/qtest/pnv-host-i2c-test.c | 13 +- > tests/qtest/pnv-phb-test.c | 235 +++++++++++ > tests/qtest/pnv-qtest-common.h | 24 ++ > tests/qtest/pnv-xive2-common.h | 7 +- > 9 files changed, 868 insertions(+), 76 deletions(-) > create mode 100644 tests/qtest/pnv-phb-test.c > create mode 100644 tests/qtest/pnv-qtest-common.h >