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From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 07/15] drm/i915/pxp: load the pxp module when we have a gsc-loaded huc
Date: Sat, 18 Jun 2022 07:27:13 +0000	[thread overview]
Message-ID: <e26f03df88bfa3dccfaf80ccc33eefd460b67934.camel@intel.com> (raw)
In-Reply-To: <20220609231955.3632596-8-daniele.ceraolospurio@intel.com>

Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>

On Thu, 2022-06-09 at 16:19 -0700, Ceraolo Spurio, Daniele wrote:
> The mei_pxp module is required to send the command to load authenticate
> the HuC to the GSC even if pxp is not in use for protected content
> management.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                | 10 +++---
>  drivers/gpu/drm/i915/pxp/intel_pxp.c         | 32 +++++++++++++-------
>  drivers/gpu/drm/i915/pxp/intel_pxp.h         | 32 --------------------
>  drivers/gpu/drm/i915/pxp/intel_pxp_irq.h     |  8 +++++
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.c |  8 ++++-
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.h | 11 +++++--
>  drivers/gpu/drm/i915/pxp/intel_pxp_tee.c     | 10 ++++--
>  7 files changed, 57 insertions(+), 54 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index d2b18f03a33c..5d3aa4807def 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -303,15 +303,17 @@ i915-y += \
>  
>  i915-y += i915_perf.o
>  
> -# Protected execution platform (PXP) support
> -i915-$(CONFIG_DRM_I915_PXP) += \
> +# Protected execution platform (PXP) support. Base support is required for HuC
> +i915-y += \
>  	pxp/intel_pxp.o \
> +	pxp/intel_pxp_tee.o
> +
> +i915-$(CONFIG_DRM_I915_PXP) += \
>  	pxp/intel_pxp_cmd.o \
>  	pxp/intel_pxp_debugfs.o \
>  	pxp/intel_pxp_irq.o \
>  	pxp/intel_pxp_pm.o \
> -	pxp/intel_pxp_session.o \
> -	pxp/intel_pxp_tee.o
> +	pxp/intel_pxp_session.o
>  
>  # Post-mortem debug and GPU hang state capture
>  i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 15311eaed848..b602a51c3692 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -103,19 +103,15 @@ static int create_vcs_context(struct intel_pxp *pxp)
>  
>  static void destroy_vcs_context(struct intel_pxp *pxp)
>  {
> -	intel_engine_destroy_pinned_context(fetch_and_zero(&pxp->ce));
> +	if (pxp->ce)
> +		intel_engine_destroy_pinned_context(fetch_and_zero(&pxp->ce));
>  }
>  
> -void intel_pxp_init(struct intel_pxp *pxp)
> +static void pxp_init_full(struct intel_pxp *pxp)
>  {
>  	struct intel_gt *gt = pxp_to_gt(pxp);
>  	int ret;
>  
> -	if (!HAS_PXP(gt->i915))
> -		return;
> -
> -	mutex_init(&pxp->tee_mutex);
> -
>  	/*
>  	 * we'll use the completion to check if there is a termination pending,
>  	 * so we start it as completed and we reinit it when a termination
> @@ -124,8 +120,7 @@ void intel_pxp_init(struct intel_pxp *pxp)
>  	init_completion(&pxp->termination);
>  	complete_all(&pxp->termination);
>  
> -	mutex_init(&pxp->arb_mutex);
> -	INIT_WORK(&pxp->session_work, intel_pxp_session_work);
> +	intel_pxp_session_management_init(pxp);
>  
>  	ret = create_vcs_context(pxp);
>  	if (ret)
> @@ -143,11 +138,26 @@ void intel_pxp_init(struct intel_pxp *pxp)
>  	destroy_vcs_context(pxp);
>  }
>  
> -void intel_pxp_fini(struct intel_pxp *pxp)
> +void intel_pxp_init(struct intel_pxp *pxp)
>  {
> -	if (!intel_pxp_is_enabled(pxp))
> +	struct intel_gt *gt = pxp_to_gt(pxp);
> +
> +	/* we rely on the mei PXP module */
> +	if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
>  		return;
>  
> +	/*
> +	 * If HuC is loaded by GSC but PXP is disabled, we can skip the init of
> +	 * the full PXP session/object management and just init the tee channel.
> +	 */
> +	if (HAS_PXP(gt->i915))
> +		pxp_init_full(pxp);
> +	else if (intel_huc_is_loaded_by_gsc(&gt->uc.huc) && intel_uc_uses_huc(&gt->uc))
> +		intel_pxp_tee_component_init(pxp);
> +}
> +
> +void intel_pxp_fini(struct intel_pxp *pxp)
> +{
>  	pxp->arb_is_valid = false;
>  
>  	intel_pxp_tee_component_fini(pxp);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index 73847e535cab..2da309088c6d 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -12,7 +12,6 @@
>  struct intel_pxp;
>  struct drm_i915_gem_object;
>  
> -#ifdef CONFIG_DRM_I915_PXP
>  struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
>  bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
>  bool intel_pxp_is_active(const struct intel_pxp *pxp);
> @@ -32,36 +31,5 @@ int intel_pxp_key_check(struct intel_pxp *pxp,
>  			bool assign);
>  
>  void intel_pxp_invalidate(struct intel_pxp *pxp);
> -#else
> -static inline void intel_pxp_init(struct intel_pxp *pxp)
> -{
> -}
> -
> -static inline void intel_pxp_fini(struct intel_pxp *pxp)
> -{
> -}
> -
> -static inline int intel_pxp_start(struct intel_pxp *pxp)
> -{
> -	return -ENODEV;
> -}
> -
> -static inline bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
> -{
> -	return false;
> -}
> -
> -static inline bool intel_pxp_is_active(const struct intel_pxp *pxp)
> -{
> -	return false;
> -}
> -
> -static inline int intel_pxp_key_check(struct intel_pxp *pxp,
> -				      struct drm_i915_gem_object *obj,
> -				      bool assign)
> -{
> -	return -ENODEV;
> -}
> -#endif
>  
>  #endif /* __INTEL_PXP_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
> index 8b5793654844..8c292dc86f68 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
> @@ -27,6 +27,14 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
>  static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
>  {
>  }
> +
> +static inline void intel_pxp_irq_enable(struct intel_pxp *pxp)
> +{
> +}
> +
> +static inline void intel_pxp_irq_disable(struct intel_pxp *pxp)
> +{
> +}
>  #endif
>  
>  #endif /* __INTEL_PXP_IRQ_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> index 92b00b4de240..8453e13e9120 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
> @@ -137,7 +137,7 @@ static void pxp_terminate_complete(struct intel_pxp *pxp)
>  	complete_all(&pxp->termination);
>  }
>  
> -void intel_pxp_session_work(struct work_struct *work)
> +static void pxp_session_work(struct work_struct *work)
>  {
>  	struct intel_pxp *pxp = container_of(work, typeof(*pxp), session_work);
>  	struct intel_gt *gt = pxp_to_gt(pxp);
> @@ -172,3 +172,9 @@ void intel_pxp_session_work(struct work_struct *work)
>  
>  	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>  }
> +
> +void intel_pxp_session_management_init(struct intel_pxp *pxp)
> +{
> +	mutex_init(&pxp->arb_mutex);
> +	INIT_WORK(&pxp->session_work, pxp_session_work);
> +}
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_session.h b/drivers/gpu/drm/i915/pxp/intel_pxp_session.h
> index ba4c9d2b94b7..903ac52cffa1 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_session.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_session.h
> @@ -8,8 +8,13 @@
>  
>  #include <linux/types.h>
>  
> -struct work_struct;
> -
> -void intel_pxp_session_work(struct work_struct *work);
> +struct intel_pxp;
>  
> +#ifdef CONFIG_DRM_I915_PXP
> +void intel_pxp_session_management_init(struct intel_pxp *pxp);
> +#else
> +static inline void intel_pxp_session_management_init(struct intel_pxp *pxp)
> +{
> +}
> +#endif
>  #endif /* __INTEL_PXP_SESSION_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 4b6f5655fab5..2c1fc49ecec1 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -97,7 +97,8 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
>  		return 0;
>  
>  	/* the component is required to fully start the PXP HW */
> -	intel_pxp_init_hw(pxp);
> +	if (intel_pxp_is_enabled(pxp))
> +		intel_pxp_init_hw(pxp);
>  
>  	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
>  
> @@ -111,8 +112,9 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
>  	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
>  	intel_wakeref_t wakeref;
>  
> -	with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
> -		intel_pxp_fini_hw(pxp);
> +	if (intel_pxp_is_enabled(pxp))
> +		with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
> +			intel_pxp_fini_hw(pxp);
>  
>  	mutex_lock(&pxp->tee_mutex);
>  	pxp->pxp_component = NULL;
> @@ -130,6 +132,8 @@ int intel_pxp_tee_component_init(struct intel_pxp *pxp)
>  	struct intel_gt *gt = pxp_to_gt(pxp);
>  	struct drm_i915_private *i915 = gt->i915;
>  
> +	mutex_init(&pxp->tee_mutex);
> +
>  	ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops,
>  				  I915_COMPONENT_PXP);
>  	if (ret < 0) {
> -- 
> 2.25.1
> 


  reply	other threads:[~2022-06-18  7:27 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-09 23:19 [Intel-gfx] [PATCH 00/15] HuC loading for DG2 Daniele Ceraolo Spurio
2022-06-09 23:19 ` [Intel-gfx] [PATCH 01/15] HAX: mei: GSC support for XeHP SDV and DG2 platform Daniele Ceraolo Spurio
2022-06-09 23:19 ` [Intel-gfx] [PATCH 02/15] mei: add support to GSC extended header Daniele Ceraolo Spurio
2022-08-03 22:07   ` Teres Alexis, Alan Previn
2022-08-16 20:49     ` Winkler, Tomas
2022-06-09 23:19 ` [Intel-gfx] [PATCH 03/15] mei: bus: enable sending gsc commands Daniele Ceraolo Spurio
2022-06-09 23:19 ` [Intel-gfx] [PATCH 04/15] mei: bus: extend bus API to support command streamer API Daniele Ceraolo Spurio
2022-06-09 23:19 ` [Intel-gfx] [PATCH 05/15] mei: pxp: add command streamer API to the PXP driver Daniele Ceraolo Spurio
2022-07-27  1:42   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 06/15] mei: pxp: support matching with a gfx discrete card Daniele Ceraolo Spurio
2022-07-27  1:01   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 07/15] drm/i915/pxp: load the pxp module when we have a gsc-loaded huc Daniele Ceraolo Spurio
2022-06-18  7:27   ` Teres Alexis, Alan Previn [this message]
2022-06-09 23:19 ` [Intel-gfx] [PATCH 08/15] drm/i915/pxp: implement function for sending tee stream command Daniele Ceraolo Spurio
2022-06-18  8:07   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 09/15] drm/i915/pxp: add huc authentication and loading command Daniele Ceraolo Spurio
2022-06-21  6:33   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 10/15] drm/i915/dg2: setup HuC loading via GSC Daniele Ceraolo Spurio
2022-07-05 22:35   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 11/15] drm/i915/huc: track delayed HuC load with a fence Daniele Ceraolo Spurio
2022-07-06  4:42   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 12/15] drm/i915/huc: stall media submission until HuC is loaded Daniele Ceraolo Spurio
2022-07-27  0:33   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 13/15] drm/i915/huc: report HuC as loaded even if load still in progress Daniele Ceraolo Spurio
2022-07-06  4:49   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 14/15] drm/i915/huc: define gsc-compatible HuC fw for DG2 Daniele Ceraolo Spurio
2022-06-22 17:55   ` Teres Alexis, Alan Previn
2022-06-22 18:16   ` Teres Alexis, Alan Previn
2022-06-09 23:19 ` [Intel-gfx] [PATCH 15/15] HAX: drm/i915: force INTEL_MEI_GSC and INTEL_MEI_PXP on for CI Daniele Ceraolo Spurio
2022-06-10  0:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HuC loading for DG2 Patchwork
2022-06-10  0:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-06-10  8:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-06-11  8:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-06-13  8:16 ` [Intel-gfx] [PATCH 00/15] " Tvrtko Ursulin
2022-06-13 15:39   ` Ceraolo Spurio, Daniele
2022-06-13 16:31     ` Tvrtko Ursulin
2022-06-13 16:41       ` Ceraolo Spurio, Daniele
2022-06-13 16:56         ` Tvrtko Ursulin
2022-06-13 17:06           ` Ceraolo Spurio, Daniele
2022-06-13 17:39             ` Tvrtko Ursulin
2022-06-13 18:13               ` Ceraolo Spurio, Daniele
2022-06-14  7:44                 ` Tvrtko Ursulin
2022-06-14 15:30                   ` Ceraolo Spurio, Daniele
2022-06-14 23:15                     ` Ye, Tony
2022-06-15 10:13                       ` Tvrtko Ursulin
2022-06-15 14:35                         ` Ceraolo Spurio, Daniele
2022-06-15 14:53                           ` Tvrtko Ursulin
2022-06-15 16:14                         ` Ye, Tony
2022-06-16  2:28                           ` Zhang, Carl
2022-07-05 23:30                             ` Ceraolo Spurio, Daniele
2022-07-06 17:26                               ` Ye, Tony
2022-07-06 19:29                                 ` Ceraolo Spurio, Daniele
2022-07-06 20:11                                   ` Ye, Tony
2022-06-16  7:10                           ` Tvrtko Ursulin

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