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X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: b83XVbRN2RoHu3LR8IC3jkrU7Fr/HiQz+KMs4w9m0ARup3VLAcubllzApXFikPvSv51iXMpKGzW6kFXzhLTFGg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR11MB6040 X-OriginatorOrg: intel.com X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On 28-08-2026 20:43, Rodrigo Vivi wrote: > On Tue, Aug 25, 2026 at 12:06:16PM +0530, Riana Tauro wrote: >> Rename ras to drm_ras in xe_device to distinquish drm-ras functionality >> from device related RAS functionality. >> >> No functional changes. >> >> Signed-off-by: Riana Tauro >> --- >> drivers/gpu/drm/xe/xe_device_types.h | 4 ++-- >> drivers/gpu/drm/xe/xe_drm_ras.c | 12 ++++++------ >> drivers/gpu/drm/xe/xe_hw_error.c | 6 +++--- >> 3 files changed, 11 insertions(+), 11 deletions(-) >> >> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h >> index 180d450a6deb..1494f3a6c62b 100644 >> --- a/drivers/gpu/drm/xe/xe_device_types.h >> +++ b/drivers/gpu/drm/xe/xe_device_types.h >> @@ -550,8 +550,8 @@ struct xe_device { >> /** @pmu: performance monitoring unit */ >> struct xe_pmu pmu; >> >> - /** @ras: RAS structure for device */ >> - struct xe_drm_ras ras; >> + /** @drm_ras: drm-ras structure for device */ >> + struct xe_drm_ras drm_ras; > perhaps xe_ras ?! > > drm_ras makes me think this is a drm level structure... > > but I would keep this as ras and change the ones inside the functions > if/when/as needed... This is used for xe_drm_ras.  Wanted to add a different structure for caching sysctrl values for RAS as required in [PATCH 4/5] drm/xe/xe_ras: Add function to get maximum pages firmware can store - Riana Tauro . Will rename the other structure or embed it within (struct xe_drm_ras ras) Thanks Riana > >> >> /** @i2c: I2C host controller */ >> struct xe_i2c *i2c; >> diff --git a/drivers/gpu/drm/xe/xe_drm_ras.c b/drivers/gpu/drm/xe/xe_drm_ras.c >> index 78184b6ea7d4..9f37ae732770 100644 >> --- a/drivers/gpu/drm/xe/xe_drm_ras.c >> +++ b/drivers/gpu/drm/xe/xe_drm_ras.c >> @@ -20,7 +20,7 @@ static int query_error_counter(struct xe_device *xe, >> enum drm_xe_ras_error_severity severity, >> u32 error_id, const char **name, u32 *val) >> { >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> >> if (!info || !info[error_id].name) >> @@ -41,7 +41,7 @@ static int clear_error_counter(struct xe_device *xe, >> enum drm_xe_ras_error_severity severity, >> u32 error_id) >> { >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> >> if (!info || !info[error_id].name) >> @@ -110,7 +110,7 @@ static int assign_node_params(struct xe_device *xe, struct drm_ras_node *node, >> const enum drm_xe_ras_error_severity severity) >> { >> struct pci_dev *pdev = to_pci_dev(xe->drm.dev); >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> const char *device_name; >> >> device_name = kasprintf(GFP_KERNEL, "%04x:%02x:%02x.%d", >> @@ -156,7 +156,7 @@ static void cleanup_node(struct drm_device *drm, void *node) >> >> static int register_nodes(struct xe_device *xe) >> { >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct drm_ras_node *node; >> int i, ret; >> >> @@ -196,7 +196,7 @@ static int register_nodes(struct xe_device *xe) >> */ >> void xe_drm_ras_event(struct xe_device *xe, u32 component, u32 severity, u32 value) >> { >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> struct drm_ras_node *node; >> int ret; >> @@ -226,7 +226,7 @@ void xe_drm_ras_event(struct xe_device *xe, u32 component, u32 severity, u32 val >> */ >> int xe_drm_ras_init(struct xe_device *xe) >> { >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct drm_ras_node *node; >> int err; >> >> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c >> index 5f2abc9485ff..90b73077ef41 100644 >> --- a/drivers/gpu/drm/xe/xe_hw_error.c >> +++ b/drivers/gpu/drm/xe/xe_hw_error.c >> @@ -240,7 +240,7 @@ static void log_soc_error(struct xe_tile *tile, const char * const *reg_info, >> { >> const char *severity_str = error_severity[severity]; >> struct xe_device *xe = tile_to_xe(tile); >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> const char *name; >> >> @@ -260,7 +260,7 @@ static void gt_hw_error_handler(struct xe_tile *tile, const enum hardware_error >> { >> const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err); >> struct xe_device *xe = tile_to_xe(tile); >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> struct xe_mmio *mmio = &tile->mmio; >> unsigned long err_stat = 0; >> @@ -422,7 +422,7 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er >> const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err); >> const char *severity_str = error_severity[severity]; >> struct xe_device *xe = tile_to_xe(tile); >> - struct xe_drm_ras *ras = &xe->ras; >> + struct xe_drm_ras *ras = &xe->drm_ras; >> struct xe_drm_ras_counter *info = ras->info[severity]; >> unsigned long flags, err_src; >> u32 err_bit; >> -- >> 2.47.1 >>