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(p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F320E6E4F8; Mon, 28 Jun 2021 17:34:08 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6F9766E4F8; Mon, 28 Jun 2021 17:34:07 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10029"; a="204995267" X-IronPort-AV: E=Sophos;i="5.83,306,1616482800"; d="scan'208";a="204995267" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2021 10:34:07 -0700 X-IronPort-AV: E=Sophos;i="5.83,306,1616482800"; d="scan'208";a="640988964" Received: from danielmi-mobl2.ger.corp.intel.com (HELO [10.249.254.242]) ([10.249.254.242]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2021 10:34:05 -0700 To: Matthew Auld , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20210628144626.76126-1-thomas.hellstrom@linux.intel.com> <20210628144626.76126-2-thomas.hellstrom@linux.intel.com> <363b99a9-d429-3611-c1a0-aae7f3722bd1@intel.com> From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= Message-ID: Date: Mon, 28 Jun 2021 19:34:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <363b99a9-d429-3611-c1a0-aae7f3722bd1@intel.com> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH v3 1/5] drm/i915/gem: Implement object migration X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ck9uIDYvMjgvMjEgNjoyOCBQTSwgTWF0dGhldyBBdWxkIHdyb3RlOgo+IE9uIDI4LzA2LzIwMjEg MTU6NDYsIFRob21hcyBIZWxsc3Ryw7ZtIHdyb3RlOgo+PiBJbnRyb2R1Y2UgYW4gaW50ZXJmYWNl IHRvIG1pZ3JhdGUgb2JqZWN0cyBiZXR3ZWVuIHJlZ2lvbnMuCj4+IFRoaXMgaXMgcHJpbWFyaWx5 IGludGVuZGVkIHRvIG1pZ3JhdGUgb2JqZWN0cyB0byBMTUVNIGZvciBkaXNwbGF5IGFuZAo+PiB0 byBTWVNURU0gZm9yIGRtYS1idWYsIGJ1dCBtaWdodCBiZSByZXVzZWQgaW4gb25lIGZvcm0gb3Ig YW5vdGhlciBmb3IKPj4gcGVyZm9ybWFuY2UtYmFzZWQgbWlncmF0aW9uLgo+Pgo+PiB2MjoKPj4g LSBWZXJpZnkgdGhhdCB0aGUgbWVtb3J5IHJlZ2lvbiBnaXZlbiBhcyBhbiBpZCByZWFsbHkgZXhp c3RzLgo+PiDCoMKgIChSZXBvcnRlZCBieSBNYXR0aGV3IEF1bGQpCj4+IC0gQ2FsbCBpOTE1X2dl bV9vYmplY3Rfe2luaXQscmVsZWFzZX1fbWVtb3J5X3JlZ2lvbigpIHdoZW4gc3dpdGNoaW5nIAo+ PiByZWdpb24KPj4gwqDCoCB0byBoYW5kbGUgYWxzbyBzd2l0Y2hpbmcgcmVnaW9uIGxpc3RzLiAo UmVwb3J0ZWQgYnkgTWF0dGhldyBBdWxkKQo+PiB2MzoKPj4gLSBGaXggaTkxNV9nZW1fb2JqZWN0 X2Nhbl9taWdyYXRlKCkgdG8gcmV0dXJuIHRydWUgaWYgb2JqZWN0IGlzIAo+PiBhbHJlYWR5IGlu Cj4+IMKgwqAgdGhlIGNvcnJlY3QgcmVnaW9uLCBldmVuIGlmIHRoZSBvYmplY3Qgb3BzIGRvZXNu J3QgaGF2ZSBhIG1pZ3JhdGUoKQo+PiDCoMKgIGNhbGxiYWNrLgo+PiAtIFVwZGF0ZSB0eXBvIGlu IGNvbW1pdCBtZXNzYWdlLgo+PiAtIEZpeCBrZXJuZWxkb2Mgb2YgaTkxNV9nZW1fb2JqZWN0X3dh aXRfbWlncmF0aW9uKCkuCj4+Cj4+IFJlcG9ydGVkLWJ5OiBrZXJuZWwgdGVzdCByb2JvdCA8bGtw QGludGVsLmNvbT4KPj4gU2lnbmVkLW9mZi1ieTogVGhvbWFzIEhlbGxzdHLDtm0gPHRob21hcy5o ZWxsc3Ryb21AbGludXguaW50ZWwuY29tPgo+PiAtLS0KPj4gwqAgZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL2k5MTVfZ2VtX29iamVjdC5jwqDCoMKgIHwgOTYgKysrKysrKysrKysrKysrKysrKwo+ PiDCoCBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmjCoMKgwqAgfCAx MiArKysKPj4gwqAgLi4uL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0X3R5cGVzLmjC oCB8wqAgOSArKwo+PiDCoCBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmPC oMKgwqDCoMKgwqAgfCA2OSArKysrKysrKystLS0tCj4+IMKgIGRyaXZlcnMvZ3B1L2RybS9pOTE1 L2dlbS9pOTE1X2dlbV93YWl0LmPCoMKgwqDCoMKgIHwgMTkgKysrKwo+PiDCoCA1IGZpbGVzIGNo YW5nZWQsIDE4OCBpbnNlcnRpb25zKCspLCAxNyBkZWxldGlvbnMoLSkKPj4KPj4gZGlmZiAtLWdp dCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9vYmplY3QuYyAKPj4gYi9kcml2 ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmMKPj4gaW5kZXggMDdlOGZmOWE4 YWFlLi4xYzE4YmUwNjdiNTggMTAwNjQ0Cj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dl bS9pOTE1X2dlbV9vYmplY3QuYwo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkx NV9nZW1fb2JqZWN0LmMKPj4gQEAgLTUxMyw2ICs1MTMsMTAyIEBAIGJvb2wgaTkxNV9nZW1fb2Jq ZWN0X2hhc19pb21lbShjb25zdCBzdHJ1Y3QgCj4+IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikK Pj4gwqDCoMKgwqDCoCByZXR1cm4gb2JqLT5tZW1fZmxhZ3MgJiBJOTE1X0JPX0ZMQUdfSU9NRU07 Cj4+IMKgIH0KPj4gwqAgKy8qKgo+PiArICogaTkxNV9nZW1fb2JqZWN0X2Nhbl9taWdyYXRlIC0g V2hldGhlciBhbiBvYmplY3QgbGlrZWx5IGNhbiBiZSAKPj4gbWlncmF0ZWQKPj4gKyAqCj4+ICsg KiBAb2JqOiBUaGUgb2JqZWN0IHRvIG1pZ3JhdGUKPj4gKyAqIEBpZDogVGhlIHJlZ2lvbiBpbnRl bmRlZCB0byBtaWdyYXRlIHRvCj4+ICsgKgo+PiArICogQ2hlY2sgd2hldGhlciB0aGUgb2JqZWN0 IGJhY2tlbmQgc3VwcG9ydHMgbWlncmF0aW9uIHRvIHRoZQo+PiArICogZ2l2ZW4gcmVnaW9uLiBO b3RlIHRoYXQgcGlubmluZyBtYXkgYWZmZWN0IHRoZSBhYmlsaXR5IHRvIG1pZ3JhdGUuCj4+ICsg Kgo+PiArICogUmV0dXJuOiB0cnVlIGlmIG1pZ3JhdGlvbiBpcyBwb3NzaWJsZSwgZmFsc2Ugb3Ro ZXJ3aXNlLgo+PiArICovCj4+ICtib29sIGk5MTVfZ2VtX29iamVjdF9jYW5fbWlncmF0ZShzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqLAo+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqAgZW51bSBpbnRlbF9yZWdpb25faWQgaWQpCj4+ICt7Cj4+ICvCoMKgwqAgc3RydWN0 IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUgPSB0b19pOTE1KG9iai0+YmFzZS5kZXYpOwo+PiArwqDC oMKgIHVuc2lnbmVkIGludCBudW1fYWxsb3dlZCA9IG9iai0+bW0ubl9wbGFjZW1lbnRzOwo+PiAr wqDCoMKgIHN0cnVjdCBpbnRlbF9tZW1vcnlfcmVnaW9uICptcjsKPj4gK8KgwqDCoCB1bnNpZ25l ZCBpbnQgaTsKPj4gKwo+PiArwqDCoMKgIEdFTV9CVUdfT04oaWQgPj0gSU5URUxfUkVHSU9OX1VO S05PV04pOwo+PiArwqDCoMKgIEdFTV9CVUdfT04ob2JqLT5tbS5tYWR2ICE9IEk5MTVfTUFEVl9X SUxMTkVFRCk7Cj4+ICsKPj4gK8KgwqDCoCBtciA9IGk5MTUtPm1tLnJlZ2lvbnNbaWRdOwo+PiAr wqDCoMKgIGlmICghbXIpCj4+ICvCoMKgwqDCoMKgwqDCoCByZXR1cm4gZmFsc2U7Cj4+ICsKPj4g K8KgwqDCoCBpZiAob2JqLT5tbS5yZWdpb24gPT0gbXIpCj4+ICvCoMKgwqDCoMKgwqDCoCByZXR1 cm4gdHJ1ZTsKPj4gKwo+PiArwqDCoMKgIGlmICghaTkxNV9nZW1fb2JqZWN0X2V2aWN0YWJsZShv YmopKQo+PiArwqDCoMKgwqDCoMKgwqAgcmV0dXJuIGZhbHNlOwo+PiArCj4+ICvCoMKgwqAgaWYg KCFvYmotPm9wcy0+bWlncmF0ZSkKPj4gK8KgwqDCoMKgwqDCoMKgIHJldHVybiBmYWxzZTsKPj4g Kwo+PiArwqDCoMKgIGlmICghKG9iai0+ZmxhZ3MgJiBJOTE1X0JPX0FMTE9DX1VTRVIpKQo+PiAr wqDCoMKgwqDCoMKgwqAgcmV0dXJuIHRydWU7Cj4+ICsKPj4gK8KgwqDCoCBpZiAobnVtX2FsbG93 ZWQgPT0gMCkKPj4gK8KgwqDCoMKgwqDCoMKgIHJldHVybiBmYWxzZTsKPj4gKwo+PiArwqDCoMKg IGZvciAoaSA9IDA7IGkgPCBudW1fYWxsb3dlZDsgKytpKSB7Cj4+ICvCoMKgwqDCoMKgwqDCoCBp ZiAobXIgPT0gb2JqLT5tbS5wbGFjZW1lbnRzW2ldKQo+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDC oCByZXR1cm4gdHJ1ZTsKPj4gK8KgwqDCoCB9Cj4+ICsKPj4gK8KgwqDCoCByZXR1cm4gZmFsc2U7 Cj4+ICt9Cj4+ICsKPj4gKy8qKgo+PiArICogaTkxNV9nZW1fb2JqZWN0X21pZ3JhdGUgLSBNaWdy YXRlIGFuIG9iamVjdCB0byB0aGUgZGVzaXJlZCByZWdpb24gaWQKPj4gKyAqIEBvYmo6IFRoZSBv YmplY3QgdG8gbWlncmF0ZS4KPj4gKyAqIEB3dzogQW4gb3B0aW9uYWwgc3RydWN0IGk5MTVfZ2Vt X3d3X2N0eC4gSWYgTlVMTCwgdGhlIGJhY2tlbmQgbWF5Cj4+ICsgKiBub3QgYmUgc3VjY2Vzc2Z1 bCBpbiBldmljdGluZyBvdGhlciBvYmplY3RzIHRvIG1ha2Ugcm9vbSBmb3IgdGhpcyAKPj4gb2Jq ZWN0Lgo+PiArICogQGlkOiBUaGUgcmVnaW9uIGlkIHRvIG1pZ3JhdGUgdG8uCj4+ICsgKgo+PiAr ICogQXR0ZW1wdCB0byBtaWdyYXRlIHRoZSBvYmplY3QgdG8gdGhlIGRlc2lyZWQgbWVtb3J5IHJl Z2lvbi4gVGhlCj4+ICsgKiBvYmplY3QgYmFja2VuZCBtdXN0IHN1cHBvcnQgbWlncmF0aW9uIGFu ZCB0aGUgb2JqZWN0IG1heSBub3QgYmUKPj4gKyAqIHBpbm5lZCwgKGV4cGxpY2l0bHkgcGlubmVk IHBhZ2VzIG9yIHBpbm5lZCB2bWFzKS4gVGhlIG9iamVjdCBtdXN0Cj4+ICsgKiBiZSBsb2NrZWQu Cj4+ICsgKiBPbiBzdWNjZXNzZnVsIGNvbXBsZXRpb24sIHRoZSBvYmplY3Qgd2lsbCBoYXZlIHBh Z2VzIHBvaW50aW5nIHRvCj4+ICsgKiBtZW1vcnkgaW4gdGhlIG5ldyByZWdpb24sIGJ1dCBhbiBh c3luYyBtaWdyYXRpb24gdGFzayBtYXkgbm90IGhhdmUKPj4gKyAqIGNvbXBsZXRlZCB5ZXQsIGFu ZCB0byBhY2NvbXBsaXNoIHRoYXQsIAo+PiBpOTE1X2dlbV9vYmplY3Rfd2FpdF9taWdyYXRpb24o KQo+PiArICogbXVzdCBiZSBjYWxsZWQuCj4+ICsgKgo+PiArICogUmV0dXJuOiAwIG9uIHN1Y2Nl c3MuIE5lZ2F0aXZlIGVycm9yIGNvZGUgb24gZmFpbHVyZS4gSW4gCj4+IHBhcnRpY3VsYXIgbWF5 Cj4+ICsgKiByZXR1cm4gLUVOWElPIG9uIGxhY2sgb2YgcmVnaW9uIHNwYWNlLCAtRURFQURMSyBm b3IgZGVhZGxvY2sgCj4+IGF2b2lkYW5jZQo+PiArICogaWYgQHd3IGlzIHNldCwgLUVJTlRSIG9y IC1FUkVTVEFSVFNZUyBpZiBzaWduYWwgcGVuZGluZywgYW5kCj4+ICsgKiAtRUJVU1kgaWYgdGhl IG9iamVjdCBpcyBwaW5uZWQuCj4+ICsgKi8KPj4gK2ludCBpOTE1X2dlbV9vYmplY3RfbWlncmF0 ZShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqLAo+PiArwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgIHN0cnVjdCBpOTE1X2dlbV93d19jdHggKnd3LAo+PiArwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgIGVudW0gaW50ZWxfcmVnaW9uX2lkIGlkKQo+PiArewo+PiArwqDC oMKgIHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICppOTE1ID0gdG9faTkxNShvYmotPmJhc2UuZGV2 KTsKPj4gK8KgwqDCoCBzdHJ1Y3QgaW50ZWxfbWVtb3J5X3JlZ2lvbiAqbXI7Cj4+ICsKPj4gK8Kg wqDCoCBHRU1fQlVHX09OKGlkID49IElOVEVMX1JFR0lPTl9VTktOT1dOKTsKPj4gK8KgwqDCoCBH RU1fQlVHX09OKG9iai0+bW0ubWFkdiAhPSBJOTE1X01BRFZfV0lMTE5FRUQpOwo+PiArwqDCoMKg IGFzc2VydF9vYmplY3RfaGVsZChvYmopOwo+PiArCj4+ICvCoMKgwqAgbXIgPSBpOTE1LT5tbS5y ZWdpb25zW2lkXTsKPj4gK8KgwqDCoCBHRU1fQlVHX09OKCFtcik7Cj4+ICsKPj4gK8KgwqDCoCBp ZiAob2JqLT5tbS5yZWdpb24gPT0gbXIpCj4+ICvCoMKgwqDCoMKgwqDCoCByZXR1cm4gMDsKPj4g Kwo+PiArwqDCoMKgIGlmICghaTkxNV9nZW1fb2JqZWN0X2V2aWN0YWJsZShvYmopKQo+PiArwqDC oMKgwqDCoMKgwqAgcmV0dXJuIC1FQlVTWTsKPj4gKwo+PiArwqDCoMKgIGlmICghb2JqLT5vcHMt Pm1pZ3JhdGUpCj4+ICvCoMKgwqDCoMKgwqDCoCByZXR1cm4gLUVPUE5PVFNVUFA7Cj4+ICsKPj4g K8KgwqDCoCByZXR1cm4gb2JqLT5vcHMtPm1pZ3JhdGUob2JqLCBtcik7Cj4+ICt9Cj4+ICsKPj4g wqAgdm9pZCBpOTE1X2dlbV9pbml0X19vYmplY3RzKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpp OTE1KQo+PiDCoCB7Cj4+IMKgwqDCoMKgwqAgSU5JVF9XT1JLKCZpOTE1LT5tbS5mcmVlX3dvcmss IF9faTkxNV9nZW1fZnJlZV93b3JrKTsKPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2dlbS9pOTE1X2dlbV9vYmplY3QuaCAKPj4gYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0v aTkxNV9nZW1fb2JqZWN0LmgKPj4gaW5kZXggZWEzMjI0YTQ4MGM0Li44Y2JkN2E1MzM0ZTIgMTAw NjQ0Cj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9vYmplY3QuaAo+ PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmgKPj4gQEAg LTE3LDYgKzE3LDggQEAKPj4gwqAgI2luY2x1ZGUgImk5MTVfZ2VtX3d3LmgiCj4+IMKgICNpbmNs dWRlICJpOTE1X3ZtYV90eXBlcy5oIgo+PiDCoCArZW51bSBpbnRlbF9yZWdpb25faWQ7Cj4+ICsK Pj4gwqAgLyoKPj4gwqDCoCAqIFhYWDogVGhlcmUgaXMgYSBwcmV2YWxlbmNlIG9mIHRoZSBhc3N1 bXB0aW9uIHRoYXQgd2UgZml0IHRoZQo+PiDCoMKgICogb2JqZWN0J3MgcGFnZSBjb3VudCBpbnNp ZGUgYSAzMmJpdCBfc2lnbmVkXyB2YXJpYWJsZS4gTGV0J3MgCj4+IGRvY3VtZW50Cj4+IEBAIC01 OTcsNiArNTk5LDE2IEBAIGJvb2wgaTkxNV9nZW1fb2JqZWN0X21pZ3JhdGFibGUoc3RydWN0IAo+ PiBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopOwo+PiDCoCDCoCBib29sIGk5MTVfZ2VtX29iamVj dF92YWxpZGF0ZXNfdG9fbG1lbShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAKPj4gKm9iaik7 Cj4+IMKgICtpbnQgaTkxNV9nZW1fb2JqZWN0X21pZ3JhdGUoc3RydWN0IGRybV9pOTE1X2dlbV9v YmplY3QgKm9iaiwKPj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBzdHJ1Y3QgaTkx NV9nZW1fd3dfY3R4ICp3dywKPj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBlbnVt IGludGVsX3JlZ2lvbl9pZCBpZCk7Cj4+ICsKPj4gK2Jvb2wgaTkxNV9nZW1fb2JqZWN0X2Nhbl9t aWdyYXRlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCj4+ICvCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoCBlbnVtIGludGVsX3JlZ2lvbl9pZCBpZCk7Cj4+ICsKPj4gK2lu dCBpOTE1X2dlbV9vYmplY3Rfd2FpdF9taWdyYXRpb24oc3RydWN0IGRybV9pOTE1X2dlbV9vYmpl Y3QgKm9iaiwKPj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB1bnNpZ25l ZCBpbnQgZmxhZ3MpOwo+PiArCj4+IMKgICNpZmRlZiBDT05GSUdfTU1VX05PVElGSUVSCj4+IMKg IHN0YXRpYyBpbmxpbmUgYm9vbAo+PiDCoCBpOTE1X2dlbV9vYmplY3RfaXNfdXNlcnB0cihzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQo+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv ZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oIAo+PiBiL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2dlbS9pOTE1X2dlbV9vYmplY3RfdHlwZXMuaAo+PiBpbmRleCA0NDFmOTEzYzg3ZTYu LmVmM2RlMmFlOTcyMyAxMDA2NDQKPj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5 MTVfZ2VtX29iamVjdF90eXBlcy5oCj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9p OTE1X2dlbV9vYmplY3RfdHlwZXMuaAo+PiBAQCAtMTgsNiArMTgsNyBAQAo+PiDCoCDCoCBzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdDsKPj4gwqAgc3RydWN0IGludGVsX2Zyb25idWZmZXI7Cj4+ ICtzdHJ1Y3QgaW50ZWxfbWVtb3J5X3JlZ2lvbjsKPj4gwqAgwqAgLyoKPj4gwqDCoCAqIHN0cnVj dCBpOTE1X2x1dF9oYW5kbGUgdHJhY2tzIHRoZSBmYXN0IGxvb2t1cHMgZnJvbSBoYW5kbGUgdG8g Cj4+IHZtYSB1c2VkCj4+IEBAIC03Nyw2ICs3OCwxNCBAQCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29i amVjdF9vcHMgewo+PiDCoMKgwqDCoMKgwqAgKiBkZWxheWVkX2ZyZWUgLSBPdmVycmlkZSB0aGUg ZGVmYXVsdCBkZWxheWVkIGZyZWUgaW1wbGVtZW50YXRpb24KPj4gwqDCoMKgwqDCoMKgICovCj4+ IMKgwqDCoMKgwqAgdm9pZCAoKmRlbGF5ZWRfZnJlZSkoc3RydWN0IGRybV9pOTE1X2dlbV9vYmpl Y3QgKm9iaik7Cj4+ICsKPj4gK8KgwqDCoCAvKioKPj4gK8KgwqDCoMKgICogbWlncmF0ZSAtIE1p Z3JhdGUgb2JqZWN0IHRvIGEgZGlmZmVyZW50IHJlZ2lvbiBlaXRoZXIgZm9yCj4+ICvCoMKgwqDC oCAqIHBpbm5pbmcgb3IgZm9yIGFzIGxvbmcgYXMgdGhlIG9iamVjdCBsb2NrIGlzIGhlbGQuCj4+ ICvCoMKgwqDCoCAqLwo+PiArwqDCoMKgIGludCAoKm1pZ3JhdGUpKHN0cnVjdCBkcm1faTkxNV9n ZW1fb2JqZWN0ICpvYmosCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHN0cnVjdCBp bnRlbF9tZW1vcnlfcmVnaW9uICptcik7Cj4+ICsKPj4gwqDCoMKgwqDCoCB2b2lkICgqcmVsZWFz ZSkoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaik7Cj4+IMKgIMKgwqDCoMKgwqAgY29u c3Qgc3RydWN0IHZtX29wZXJhdGlvbnNfc3RydWN0ICptbWFwX29wczsKPj4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV90dG0uYyAKPj4gYi9kcml2ZXJzL2dw dS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmMKPj4gaW5kZXggYzM5ZDk4MmM0ZmE2Li44Zjg5 MTg1YjY1MDcgMTAwNjQ0Cj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dl bV90dG0uYwo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmMK Pj4gQEAgLTYxNyw3ICs2MTcsOCBAQCBzdHJ1Y3QgdHRtX2RldmljZV9mdW5jcyAqaTkxNV90dG1f ZHJpdmVyKHZvaWQpCj4+IMKgwqDCoMKgwqAgcmV0dXJuICZpOTE1X3R0bV9ib19kcml2ZXI7Cj4+ IMKgIH0KPj4gwqAgLXN0YXRpYyBpbnQgaTkxNV90dG1fZ2V0X3BhZ2VzKHN0cnVjdCBkcm1faTkx NV9nZW1fb2JqZWN0ICpvYmopCj4+ICtzdGF0aWMgaW50IF9faTkxNV90dG1fZ2V0X3BhZ2VzKHN0 cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqAgc3RydWN0IHR0bV9wbGFjZW1lbnQgKnBsYWNlbWVudCkKPj4gwqAgewo+PiDCoMKg wqDCoMKgIHN0cnVjdCB0dG1fYnVmZmVyX29iamVjdCAqYm8gPSBpOTE1X2dlbV90b190dG0ob2Jq KTsKPj4gwqDCoMKgwqDCoCBzdHJ1Y3QgdHRtX29wZXJhdGlvbl9jdHggY3R4ID0gewo+PiBAQCAt NjI1LDE5ICs2MjYsMTIgQEAgc3RhdGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IAo+ PiBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCj4+IMKgwqDCoMKgwqDCoMKgwqDCoCAubm9fd2Fp dF9ncHUgPSBmYWxzZSwKPj4gwqDCoMKgwqDCoCB9Owo+PiDCoMKgwqDCoMKgIHN0cnVjdCBzZ190 YWJsZSAqc3Q7Cj4+IC3CoMKgwqAgc3RydWN0IHR0bV9wbGFjZSByZXF1ZXN0ZWQsIGJ1c3lbSTkx NV9UVE1fTUFYX1BMQUNFTUVOVFNdOwo+PiAtwqDCoMKgIHN0cnVjdCB0dG1fcGxhY2VtZW50IHBs YWNlbWVudDsKPj4gwqDCoMKgwqDCoCBpbnQgcmVhbF9udW1fYnVzeTsKPj4gwqDCoMKgwqDCoCBp bnQgcmV0Owo+PiDCoCAtwqDCoMKgIEdFTV9CVUdfT04ob2JqLT5tbS5uX3BsYWNlbWVudHMgPiBJ OTE1X1RUTV9NQVhfUExBQ0VNRU5UUyk7Cj4+IC0KPj4gLcKgwqDCoCAvKiBNb3ZlIHRvIHRoZSBy ZXF1ZXN0ZWQgcGxhY2VtZW50LiAqLwo+PiAtwqDCoMKgIGk5MTVfdHRtX3BsYWNlbWVudF9mcm9t X29iaihvYmosICZyZXF1ZXN0ZWQsIGJ1c3ksICZwbGFjZW1lbnQpOwo+PiAtCj4+IMKgwqDCoMKg wqAgLyogRmlyc3QgdHJ5IG9ubHkgdGhlIHJlcXVlc3RlZCBwbGFjZW1lbnQuIE5vIGV2aWN0aW9u LiAqLwo+PiAtwqDCoMKgIHJlYWxfbnVtX2J1c3kgPSBmZXRjaF9hbmRfemVybygmcGxhY2VtZW50 Lm51bV9idXN5X3BsYWNlbWVudCk7Cj4+IC3CoMKgwqAgcmV0ID0gdHRtX2JvX3ZhbGlkYXRlKGJv LCAmcGxhY2VtZW50LCAmY3R4KTsKPj4gK8KgwqDCoCByZWFsX251bV9idXN5ID0gZmV0Y2hfYW5k X3plcm8oJnBsYWNlbWVudC0+bnVtX2J1c3lfcGxhY2VtZW50KTsKPj4gK8KgwqDCoCByZXQgPSB0 dG1fYm9fdmFsaWRhdGUoYm8sIHBsYWNlbWVudCwgJmN0eCk7Cj4+IMKgwqDCoMKgwqAgaWYgKHJl dCkgewo+PiDCoMKgwqDCoMKgwqDCoMKgwqAgcmV0ID0gaTkxNV90dG1fZXJyX3RvX2dlbShyZXQp Owo+PiDCoMKgwqDCoMKgwqDCoMKgwqAgLyoKPj4gQEAgLTY1Miw4ICs2NDYsOCBAQCBzdGF0aWMg aW50IGk5MTVfdHRtX2dldF9wYWdlcyhzdHJ1Y3QgCj4+IGRybV9pOTE1X2dlbV9vYmplY3QgKm9i aikKPj4gwqDCoMKgwqDCoMKgwqDCoMKgwqAgKiBJZiB0aGUgaW5pdGlhbCBhdHRlbXB0IGZhaWxz LCBhbGxvdyBhbGwgYWNjZXB0ZWQgCj4+IHBsYWNlbWVudHMsCj4+IMKgwqDCoMKgwqDCoMKgwqDC oMKgICogZXZpY3RpbmcgaWYgbmVjZXNzYXJ5Lgo+PiDCoMKgwqDCoMKgwqDCoMKgwqDCoCAqLwo+ PiAtwqDCoMKgwqDCoMKgwqAgcGxhY2VtZW50Lm51bV9idXN5X3BsYWNlbWVudCA9IHJlYWxfbnVt X2J1c3k7Cj4+IC3CoMKgwqDCoMKgwqDCoCByZXQgPSB0dG1fYm9fdmFsaWRhdGUoYm8sICZwbGFj ZW1lbnQsICZjdHgpOwo+PiArwqDCoMKgwqDCoMKgwqAgcGxhY2VtZW50LT5udW1fYnVzeV9wbGFj ZW1lbnQgPSByZWFsX251bV9idXN5Owo+PiArwqDCoMKgwqDCoMKgwqAgcmV0ID0gdHRtX2JvX3Zh bGlkYXRlKGJvLCBwbGFjZW1lbnQsICZjdHgpOwo+PiDCoMKgwqDCoMKgwqDCoMKgwqAgaWYgKHJl dCkKPj4gwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgcmV0dXJuIGk5MTVfdHRtX2Vycl90b19n ZW0ocmV0KTsKPj4gwqDCoMKgwqDCoCB9Cj4+IEBAIC02NjgsMTYgKzY2Miw1NiBAQCBzdGF0aWMg aW50IGk5MTVfdHRtX2dldF9wYWdlcyhzdHJ1Y3QgCj4+IGRybV9pOTE1X2dlbV9vYmplY3QgKm9i aikKPj4gwqDCoMKgwqDCoMKgwqDCoMKgIGk5MTVfdHRtX2FkanVzdF9nZW1fYWZ0ZXJfbW92ZShv YmopOwo+PiDCoMKgwqDCoMKgIH0KPj4gwqAgLcKgwqDCoCAvKiBPYmplY3QgZWl0aGVyIGhhcyBh IHBhZ2UgdmVjdG9yIG9yIGlzIGFuIGlvbWVtIG9iamVjdCAqLwo+PiAtwqDCoMKgIHN0ID0gYm8t PnR0bSA/IGk5MTVfdHRtX3R0X2dldF9zdChiby0+dHRtKSA6IG9iai0+dHRtLmNhY2hlZF9pb19z dDsKPj4gLcKgwqDCoCBpZiAoSVNfRVJSKHN0KSkKPj4gLcKgwqDCoMKgwqDCoMKgIHJldHVybiBQ VFJfRVJSKHN0KTsKPj4gK8KgwqDCoCBpZiAoIW9iai0+bW0ucGFnZXMpIHsKPgo+IElzIHRoaXMg Zm9yIHRoZSBtaWdyYXRpb24gY2FzZT8gV2hlcmUgYXJlIHdlIHVwZGF0aW5nIHRoZSBtbS5wYWdl cywgCj4gYXNzdW1pbmcgdGhlIG1pZ3JhdGlvbiBzdGVwIGhhcyB0byB0YWtlIGNhcmUgb2YgcHJl LWV4aXN0aW5nIHBhZ2VzPyAKPiBXaGF0IGFtIEkgbWlzc2luZz8KCkhtbSwgeWVzIHRoaXMgaXMg Zm9yIGEgaHlwb3RldGljYWwgbWlncmF0aW9uIGNhc2Ugd2hlcmUgCnR0bV9ib192YWxpZGF0ZSgp IGRlY2lkZWQgdG8gbm90IGNoYW5nZSBwbGFjZW1lbnQgb2YgdGhlIG9iamVjdCwgbWVhbmluZyAK d2UgbWlncmF0ZSB0byB0aGUgdmVyeSBzYW1lIHJlZ2lvbiB0aGF0IHdlJ3JlIGFscmVhZHkgaW4u IFRoYXQgc2hvdWxkIGJlIApibG9ja2VkIGF0IHRoZSBnZW0gbGV2ZWwsIHNvIEkgZ3Vlc3Mgd2Ug Y291bGQgcmVwbGFjZSB0aGlzIHdpdGggYSAKR0VNX0JVR19PTigpLgoKPgo+PiArwqDCoMKgwqDC oMKgwqAgLyogT2JqZWN0IGVpdGhlciBoYXMgYSBwYWdlIHZlY3RvciBvciBpcyBhbiBpb21lbSBv YmplY3QgKi8KPj4gK8KgwqDCoMKgwqDCoMKgIHN0ID0gYm8tPnR0bSA/IGk5MTVfdHRtX3R0X2dl dF9zdChiby0+dHRtKSA6IAo+PiBvYmotPnR0bS5jYWNoZWRfaW9fc3Q7Cj4+ICvCoMKgwqDCoMKg wqDCoCBpZiAoSVNfRVJSKHN0KSkKPj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAgcmV0dXJuIFBU Ul9FUlIoc3QpOwo+PiDCoCAtwqDCoMKgIF9faTkxNV9nZW1fb2JqZWN0X3NldF9wYWdlcyhvYmos IHN0LCBpOTE1X3NnX2RtYV9zaXplcyhzdC0+c2dsKSk7Cj4+ICvCoMKgwqDCoMKgwqDCoCBfX2k5 MTVfZ2VtX29iamVjdF9zZXRfcGFnZXMob2JqLCBzdCwgCj4+IGk5MTVfc2dfZG1hX3NpemVzKHN0 LT5zZ2wpKTsKPj4gK8KgwqDCoCB9Cj4+IMKgIMKgwqDCoMKgwqAgcmV0dXJuIHJldDsKPj4gwqAg fQo+PiDCoCArc3RhdGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dl bV9vYmplY3QgKm9iaikKPj4gK3sKPj4gK8KgwqDCoCBzdHJ1Y3QgdHRtX3BsYWNlIHJlcXVlc3Rl ZCwgYnVzeVtJOTE1X1RUTV9NQVhfUExBQ0VNRU5UU107Cj4+ICvCoMKgwqAgc3RydWN0IHR0bV9w bGFjZW1lbnQgcGxhY2VtZW50Owo+PiArCj4+ICvCoMKgwqAgR0VNX0JVR19PTihvYmotPm1tLm5f cGxhY2VtZW50cyA+IEk5MTVfVFRNX01BWF9QTEFDRU1FTlRTKTsKPj4gKwo+PiArwqDCoMKgIC8q IE1vdmUgdG8gdGhlIHJlcXVlc3RlZCBwbGFjZW1lbnQuICovCj4+ICvCoMKgwqAgaTkxNV90dG1f cGxhY2VtZW50X2Zyb21fb2JqKG9iaiwgJnJlcXVlc3RlZCwgYnVzeSwgJnBsYWNlbWVudCk7Cj4+ ICsKPj4gK8KgwqDCoCByZXR1cm4gX19pOTE1X3R0bV9nZXRfcGFnZXMob2JqLCAmcGxhY2VtZW50 KTsKPj4gK30KPj4gKwo+PiArc3RhdGljIGludCBpOTE1X3R0bV9taWdyYXRlKHN0cnVjdCBkcm1f aTkxNV9nZW1fb2JqZWN0ICpvYmosCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAg c3RydWN0IGludGVsX21lbW9yeV9yZWdpb24gKm1yKQo+PiArewo+PiArwqDCoMKgIHN0cnVjdCB0 dG1fcGxhY2UgcmVxdWVzdGVkOwo+PiArwqDCoMKgIHN0cnVjdCB0dG1fcGxhY2VtZW50IHBsYWNl bWVudDsKPj4gK8KgwqDCoCBpbnQgcmV0Owo+PiArCj4+ICvCoMKgwqAgaTkxNV90dG1fcGxhY2Vf ZnJvbV9yZWdpb24obXIsICZyZXF1ZXN0ZWQsIG9iai0+ZmxhZ3MpOwo+PiArwqDCoMKgIHBsYWNl bWVudC5udW1fcGxhY2VtZW50ID0gMTsKPj4gK8KgwqDCoCBwbGFjZW1lbnQubnVtX2J1c3lfcGxh Y2VtZW50ID0gMTsKPj4gK8KgwqDCoCBwbGFjZW1lbnQucGxhY2VtZW50ID0gJnJlcXVlc3RlZDsK Pj4gK8KgwqDCoCBwbGFjZW1lbnQuYnVzeV9wbGFjZW1lbnQgPSAmcmVxdWVzdGVkOwo+PiArCj4+ ICvCoMKgwqAgcmV0ID0gX19pOTE1X3R0bV9nZXRfcGFnZXMob2JqLCAmcGxhY2VtZW50KTsKPj4g K8KgwqDCoCBpZiAocmV0KQo+PiArwqDCoMKgwqDCoMKgwqAgcmV0dXJuIHJldDsKPj4gKwo+PiAr wqDCoMKgIGlmIChvYmotPm1tLnJlZ2lvbiAhPSBtcikgewo+PiArwqDCoMKgwqDCoMKgwqAgaTkx NV9nZW1fb2JqZWN0X3JlbGVhc2VfbWVtb3J5X3JlZ2lvbihvYmopOwo+PiArwqDCoMKgwqDCoMKg wqAgaTkxNV9nZW1fb2JqZWN0X2luaXRfbWVtb3J5X3JlZ2lvbihvYmosIG1yKTsKPgo+IEhtbSwg c28gaXMgdGhpcyBub3QgYWxyZWFkeSBoYW5kbGVkIGJ5IGFkanVzdF9nZW1fYWZ0ZXJfbW92ZSgp PwoKTm8sIG5vdCBhbHdheXMuIGFkanVzdF9nZW1fYWZ0ZXJfbW92ZSgpIG9ubHkgY29uc2lkZXJz IGFuIG9iamVjdCAKbWlncmF0ZWQgYW5kIGZsaXBzIHJlZ2lvbiBpZiB0aGUgbmV3IHJlZ2lvbiBp cyBpbiBvbmUgb2YgdGhlIGFsbG93ZWQgCnBsYWNlbWVudHMuIE90aGVyd2lzZSBpdCdzIGNvbnNp ZGVyZWQgZXZpY3RlZCBhbmQgdGhlIG5leHQgZ2V0X3BhZ2VzKCkgCndpbGwgcmV2YWxpZGF0ZSBp bnRvIHRoZSBwcmVmZXJyZWQgcGxhY2VtZW50LgoKdGhlIGdlbV9taWdyYXRlIGludGVyZmFjZSBp cyBtb3JlIGZsZXhpYmxlLCBhbmQgb2ZmZXJzIGEgcG9zc2liaWxpdHkgdG8gCm1pZ3JhdGUgdG8g d2hhdGV2ZXIgaXQncyB0b2xkLCBzbyBhcyBsb25nIGFzIHdlIHdhbnQgdGhhdCBiZWhhdmlvdXIs IHdlIApuZWVkIHRoZSBhYm92ZS4KCi9UaG9tYXMKCgo+Cj4+ICvCoMKgwqAgfQo+PiArCj4+ICvC oMKgwqAgcmV0dXJuIDA7Cj4+ICt9Cj4+ICsKPj4gwqAgc3RhdGljIHZvaWQgaTkxNV90dG1fcHV0 X3BhZ2VzKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCj4+IMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgc3RydWN0IHNnX3RhYmxlICpzdCkKPj4gwqAgewo+ PiBAQCAtODE0LDYgKzg0OCw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29i amVjdF9vcHMgCj4+IGk5MTVfZ2VtX3R0bV9vYmpfb3BzID0gewo+PiDCoMKgwqDCoMKgIC50cnVu Y2F0ZSA9IGk5MTVfdHRtX3B1cmdlLAo+PiDCoMKgwqDCoMKgIC5hZGp1c3RfbHJ1ID0gaTkxNV90 dG1fYWRqdXN0X2xydSwKPj4gwqDCoMKgwqDCoCAuZGVsYXllZF9mcmVlID0gaTkxNV90dG1fZGVs YXllZF9mcmVlLAo+PiArwqDCoMKgIC5taWdyYXRlID0gaTkxNV90dG1fbWlncmF0ZSwKPj4gwqDC oMKgwqDCoCAubW1hcF9vZmZzZXQgPSBpOTE1X3R0bV9tbWFwX29mZnNldCwKPj4gwqDCoMKgwqDC oCAubW1hcF9vcHMgPSAmdm1fb3BzX3R0bSwKPj4gwqAgfTsKPj4gZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV93YWl0LmMgCj4+IGIvZHJpdmVycy9ncHUvZHJt L2k5MTUvZ2VtL2k5MTVfZ2VtX3dhaXQuYwo+PiBpbmRleCAxMDcwZDNhZmRjZTcuLmY5MDlhYWEw OWQ5YyAxMDA2NDQKPj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3dh aXQuYwo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fd2FpdC5jCj4+ IEBAIC0yOTAsMyArMjkwLDIyIEBAIGk5MTVfZ2VtX3dhaXRfaW9jdGwoc3RydWN0IGRybV9kZXZp Y2UgKmRldiwgdm9pZCAKPj4gKmRhdGEsIHN0cnVjdCBkcm1fZmlsZSAqZmlsZSkKPj4gwqDCoMKg wqDCoCBpOTE1X2dlbV9vYmplY3RfcHV0KG9iaik7Cj4+IMKgwqDCoMKgwqAgcmV0dXJuIHJldDsK Pj4gwqAgfQo+PiArCj4+ICsvKioKPj4gKyAqIGk5MTVfZ2VtX29iamVjdF93YWl0X21pZ3JhdGlv biAtIFN5bmMgYW4gYWNjZWxlcmF0ZWQgbWlncmF0aW9uIAo+PiBvcGVyYXRpb24KPj4gKyAqIEBv Ymo6IFRoZSBtaWdyYXRpbmcgb2JqZWN0Lgo+PiArICogQGZsYWdzOiB3YWl0aW5nIGZsYWdzLiBD dXJyZW50bHkgc3VwcG9ydHMgb25seSAKPj4gSTkxNV9XQUlUX0lOVEVSUlVQVElCTEUuCj4+ICsg Kgo+PiArICogV2FpdCBmb3IgYW55IHBlbmRpbmcgYXN5bmMgbWlncmF0aW9uIG9wZXJhdGlvbiBv biB0aGUgb2JqZWN0LAo+PiArICogd2hldGhlciBpdCdzIGV4cGxpY2l0bHkgKGk5MTVfZ2VtX29i amVjdF9taWdyYXRlKCkpIG9yIGltcGxpY2l0bHkKPj4gKyAqIChzd2FwaW4sIGluaXRpYWwgY2xl YXJpbmcpIGluaXRpYXRlZC4KPj4gKyAqCj4+ICsgKiBSZXR1cm46IDAgaWYgc3VjY2Vzc2Z1bCwg LUVSRVNUQVJUU1lTIGlmIGEgc2lnbmFsIHdhcyBoaXQgZHVyaW5nIAo+PiB3YWl0aW5nLgo+PiAr ICovCj4+ICtpbnQgaTkxNV9nZW1fb2JqZWN0X3dhaXRfbWlncmF0aW9uKHN0cnVjdCBkcm1faTkx NV9nZW1fb2JqZWN0ICpvYmosCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqAgdW5zaWduZWQgaW50IGZsYWdzKQo+PiArewo+PiArwqDCoMKgIG1pZ2h0X3NsZWVwKCk7Cj4+ ICvCoMKgwqAgLyogTk9QIGZvciBub3cuICovCj4+ICvCoMKgwqAgcmV0dXJuIDA7Cj4+ICt9Cj4+ Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdm eCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xp c3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham 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(Postfix) with ESMTPS id 6F9766E4F8; Mon, 28 Jun 2021 17:34:07 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10029"; a="204995267" X-IronPort-AV: E=Sophos;i="5.83,306,1616482800"; d="scan'208";a="204995267" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2021 10:34:07 -0700 X-IronPort-AV: E=Sophos;i="5.83,306,1616482800"; d="scan'208";a="640988964" Received: from danielmi-mobl2.ger.corp.intel.com (HELO [10.249.254.242]) ([10.249.254.242]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2021 10:34:05 -0700 Subject: Re: [PATCH v3 1/5] drm/i915/gem: Implement object migration To: Matthew Auld , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20210628144626.76126-1-thomas.hellstrom@linux.intel.com> <20210628144626.76126-2-thomas.hellstrom@linux.intel.com> <363b99a9-d429-3611-c1a0-aae7f3722bd1@intel.com> From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= Message-ID: Date: Mon, 28 Jun 2021 19:34:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <363b99a9-d429-3611-c1a0-aae7f3722bd1@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kernel test robot Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 6/28/21 6:28 PM, Matthew Auld wrote: > On 28/06/2021 15:46, Thomas Hellström wrote: >> Introduce an interface to migrate objects between regions. >> This is primarily intended to migrate objects to LMEM for display and >> to SYSTEM for dma-buf, but might be reused in one form or another for >> performance-based migration. >> >> v2: >> - Verify that the memory region given as an id really exists. >>    (Reported by Matthew Auld) >> - Call i915_gem_object_{init,release}_memory_region() when switching >> region >>    to handle also switching region lists. (Reported by Matthew Auld) >> v3: >> - Fix i915_gem_object_can_migrate() to return true if object is >> already in >>    the correct region, even if the object ops doesn't have a migrate() >>    callback. >> - Update typo in commit message. >> - Fix kerneldoc of i915_gem_object_wait_migration(). >> >> Reported-by: kernel test robot >> Signed-off-by: Thomas Hellström >> --- >>   drivers/gpu/drm/i915/gem/i915_gem_object.c    | 96 +++++++++++++++++++ >>   drivers/gpu/drm/i915/gem/i915_gem_object.h    | 12 +++ >>   .../gpu/drm/i915/gem/i915_gem_object_types.h  |  9 ++ >>   drivers/gpu/drm/i915/gem/i915_gem_ttm.c       | 69 +++++++++---- >>   drivers/gpu/drm/i915/gem/i915_gem_wait.c      | 19 ++++ >>   5 files changed, 188 insertions(+), 17 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c >> b/drivers/gpu/drm/i915/gem/i915_gem_object.c >> index 07e8ff9a8aae..1c18be067b58 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c >> @@ -513,6 +513,102 @@ bool i915_gem_object_has_iomem(const struct >> drm_i915_gem_object *obj) >>       return obj->mem_flags & I915_BO_FLAG_IOMEM; >>   } >>   +/** >> + * i915_gem_object_can_migrate - Whether an object likely can be >> migrated >> + * >> + * @obj: The object to migrate >> + * @id: The region intended to migrate to >> + * >> + * Check whether the object backend supports migration to the >> + * given region. Note that pinning may affect the ability to migrate. >> + * >> + * Return: true if migration is possible, false otherwise. >> + */ >> +bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj, >> +                 enum intel_region_id id) >> +{ >> +    struct drm_i915_private *i915 = to_i915(obj->base.dev); >> +    unsigned int num_allowed = obj->mm.n_placements; >> +    struct intel_memory_region *mr; >> +    unsigned int i; >> + >> +    GEM_BUG_ON(id >= INTEL_REGION_UNKNOWN); >> +    GEM_BUG_ON(obj->mm.madv != I915_MADV_WILLNEED); >> + >> +    mr = i915->mm.regions[id]; >> +    if (!mr) >> +        return false; >> + >> +    if (obj->mm.region == mr) >> +        return true; >> + >> +    if (!i915_gem_object_evictable(obj)) >> +        return false; >> + >> +    if (!obj->ops->migrate) >> +        return false; >> + >> +    if (!(obj->flags & I915_BO_ALLOC_USER)) >> +        return true; >> + >> +    if (num_allowed == 0) >> +        return false; >> + >> +    for (i = 0; i < num_allowed; ++i) { >> +        if (mr == obj->mm.placements[i]) >> +            return true; >> +    } >> + >> +    return false; >> +} >> + >> +/** >> + * i915_gem_object_migrate - Migrate an object to the desired region id >> + * @obj: The object to migrate. >> + * @ww: An optional struct i915_gem_ww_ctx. If NULL, the backend may >> + * not be successful in evicting other objects to make room for this >> object. >> + * @id: The region id to migrate to. >> + * >> + * Attempt to migrate the object to the desired memory region. The >> + * object backend must support migration and the object may not be >> + * pinned, (explicitly pinned pages or pinned vmas). The object must >> + * be locked. >> + * On successful completion, the object will have pages pointing to >> + * memory in the new region, but an async migration task may not have >> + * completed yet, and to accomplish that, >> i915_gem_object_wait_migration() >> + * must be called. >> + * >> + * Return: 0 on success. Negative error code on failure. In >> particular may >> + * return -ENXIO on lack of region space, -EDEADLK for deadlock >> avoidance >> + * if @ww is set, -EINTR or -ERESTARTSYS if signal pending, and >> + * -EBUSY if the object is pinned. >> + */ >> +int i915_gem_object_migrate(struct drm_i915_gem_object *obj, >> +                struct i915_gem_ww_ctx *ww, >> +                enum intel_region_id id) >> +{ >> +    struct drm_i915_private *i915 = to_i915(obj->base.dev); >> +    struct intel_memory_region *mr; >> + >> +    GEM_BUG_ON(id >= INTEL_REGION_UNKNOWN); >> +    GEM_BUG_ON(obj->mm.madv != I915_MADV_WILLNEED); >> +    assert_object_held(obj); >> + >> +    mr = i915->mm.regions[id]; >> +    GEM_BUG_ON(!mr); >> + >> +    if (obj->mm.region == mr) >> +        return 0; >> + >> +    if (!i915_gem_object_evictable(obj)) >> +        return -EBUSY; >> + >> +    if (!obj->ops->migrate) >> +        return -EOPNOTSUPP; >> + >> +    return obj->ops->migrate(obj, mr); >> +} >> + >>   void i915_gem_init__objects(struct drm_i915_private *i915) >>   { >>       INIT_WORK(&i915->mm.free_work, __i915_gem_free_work); >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h >> b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> index ea3224a480c4..8cbd7a5334e2 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> @@ -17,6 +17,8 @@ >>   #include "i915_gem_ww.h" >>   #include "i915_vma_types.h" >>   +enum intel_region_id; >> + >>   /* >>    * XXX: There is a prevalence of the assumption that we fit the >>    * object's page count inside a 32bit _signed_ variable. Let's >> document >> @@ -597,6 +599,16 @@ bool i915_gem_object_migratable(struct >> drm_i915_gem_object *obj); >>     bool i915_gem_object_validates_to_lmem(struct drm_i915_gem_object >> *obj); >>   +int i915_gem_object_migrate(struct drm_i915_gem_object *obj, >> +                struct i915_gem_ww_ctx *ww, >> +                enum intel_region_id id); >> + >> +bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj, >> +                 enum intel_region_id id); >> + >> +int i915_gem_object_wait_migration(struct drm_i915_gem_object *obj, >> +                   unsigned int flags); >> + >>   #ifdef CONFIG_MMU_NOTIFIER >>   static inline bool >>   i915_gem_object_is_userptr(struct drm_i915_gem_object *obj) >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h >> b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h >> index 441f913c87e6..ef3de2ae9723 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h >> @@ -18,6 +18,7 @@ >>     struct drm_i915_gem_object; >>   struct intel_fronbuffer; >> +struct intel_memory_region; >>     /* >>    * struct i915_lut_handle tracks the fast lookups from handle to >> vma used >> @@ -77,6 +78,14 @@ struct drm_i915_gem_object_ops { >>        * delayed_free - Override the default delayed free implementation >>        */ >>       void (*delayed_free)(struct drm_i915_gem_object *obj); >> + >> +    /** >> +     * migrate - Migrate object to a different region either for >> +     * pinning or for as long as the object lock is held. >> +     */ >> +    int (*migrate)(struct drm_i915_gem_object *obj, >> +               struct intel_memory_region *mr); >> + >>       void (*release)(struct drm_i915_gem_object *obj); >>         const struct vm_operations_struct *mmap_ops; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> index c39d982c4fa6..8f89185b6507 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c >> @@ -617,7 +617,8 @@ struct ttm_device_funcs *i915_ttm_driver(void) >>       return &i915_ttm_bo_driver; >>   } >>   -static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) >> +static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, >> +                struct ttm_placement *placement) >>   { >>       struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); >>       struct ttm_operation_ctx ctx = { >> @@ -625,19 +626,12 @@ static int i915_ttm_get_pages(struct >> drm_i915_gem_object *obj) >>           .no_wait_gpu = false, >>       }; >>       struct sg_table *st; >> -    struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS]; >> -    struct ttm_placement placement; >>       int real_num_busy; >>       int ret; >>   -    GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS); >> - >> -    /* Move to the requested placement. */ >> -    i915_ttm_placement_from_obj(obj, &requested, busy, &placement); >> - >>       /* First try only the requested placement. No eviction. */ >> -    real_num_busy = fetch_and_zero(&placement.num_busy_placement); >> -    ret = ttm_bo_validate(bo, &placement, &ctx); >> +    real_num_busy = fetch_and_zero(&placement->num_busy_placement); >> +    ret = ttm_bo_validate(bo, placement, &ctx); >>       if (ret) { >>           ret = i915_ttm_err_to_gem(ret); >>           /* >> @@ -652,8 +646,8 @@ static int i915_ttm_get_pages(struct >> drm_i915_gem_object *obj) >>            * If the initial attempt fails, allow all accepted >> placements, >>            * evicting if necessary. >>            */ >> -        placement.num_busy_placement = real_num_busy; >> -        ret = ttm_bo_validate(bo, &placement, &ctx); >> +        placement->num_busy_placement = real_num_busy; >> +        ret = ttm_bo_validate(bo, placement, &ctx); >>           if (ret) >>               return i915_ttm_err_to_gem(ret); >>       } >> @@ -668,16 +662,56 @@ static int i915_ttm_get_pages(struct >> drm_i915_gem_object *obj) >>           i915_ttm_adjust_gem_after_move(obj); >>       } >>   -    /* Object either has a page vector or is an iomem object */ >> -    st = bo->ttm ? i915_ttm_tt_get_st(bo->ttm) : obj->ttm.cached_io_st; >> -    if (IS_ERR(st)) >> -        return PTR_ERR(st); >> +    if (!obj->mm.pages) { > > Is this for the migration case? Where are we updating the mm.pages, > assuming the migration step has to take care of pre-existing pages? > What am I missing? Hmm, yes this is for a hypotetical migration case where ttm_bo_validate() decided to not change placement of the object, meaning we migrate to the very same region that we're already in. That should be blocked at the gem level, so I guess we could replace this with a GEM_BUG_ON(). > >> +        /* Object either has a page vector or is an iomem object */ >> +        st = bo->ttm ? i915_ttm_tt_get_st(bo->ttm) : >> obj->ttm.cached_io_st; >> +        if (IS_ERR(st)) >> +            return PTR_ERR(st); >>   -    __i915_gem_object_set_pages(obj, st, i915_sg_dma_sizes(st->sgl)); >> +        __i915_gem_object_set_pages(obj, st, >> i915_sg_dma_sizes(st->sgl)); >> +    } >>         return ret; >>   } >>   +static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) >> +{ >> +    struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS]; >> +    struct ttm_placement placement; >> + >> +    GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS); >> + >> +    /* Move to the requested placement. */ >> +    i915_ttm_placement_from_obj(obj, &requested, busy, &placement); >> + >> +    return __i915_ttm_get_pages(obj, &placement); >> +} >> + >> +static int i915_ttm_migrate(struct drm_i915_gem_object *obj, >> +                struct intel_memory_region *mr) >> +{ >> +    struct ttm_place requested; >> +    struct ttm_placement placement; >> +    int ret; >> + >> +    i915_ttm_place_from_region(mr, &requested, obj->flags); >> +    placement.num_placement = 1; >> +    placement.num_busy_placement = 1; >> +    placement.placement = &requested; >> +    placement.busy_placement = &requested; >> + >> +    ret = __i915_ttm_get_pages(obj, &placement); >> +    if (ret) >> +        return ret; >> + >> +    if (obj->mm.region != mr) { >> +        i915_gem_object_release_memory_region(obj); >> +        i915_gem_object_init_memory_region(obj, mr); > > Hmm, so is this not already handled by adjust_gem_after_move()? No, not always. adjust_gem_after_move() only considers an object migrated and flips region if the new region is in one of the allowed placements. Otherwise it's considered evicted and the next get_pages() will revalidate into the preferred placement. the gem_migrate interface is more flexible, and offers a possibility to migrate to whatever it's told, so as long as we want that behaviour, we need the above. /Thomas > >> +    } >> + >> +    return 0; >> +} >> + >>   static void i915_ttm_put_pages(struct drm_i915_gem_object *obj, >>                      struct sg_table *st) >>   { >> @@ -814,6 +848,7 @@ static const struct drm_i915_gem_object_ops >> i915_gem_ttm_obj_ops = { >>       .truncate = i915_ttm_purge, >>       .adjust_lru = i915_ttm_adjust_lru, >>       .delayed_free = i915_ttm_delayed_free, >> +    .migrate = i915_ttm_migrate, >>       .mmap_offset = i915_ttm_mmap_offset, >>       .mmap_ops = &vm_ops_ttm, >>   }; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c >> b/drivers/gpu/drm/i915/gem/i915_gem_wait.c >> index 1070d3afdce7..f909aaa09d9c 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c >> @@ -290,3 +290,22 @@ i915_gem_wait_ioctl(struct drm_device *dev, void >> *data, struct drm_file *file) >>       i915_gem_object_put(obj); >>       return ret; >>   } >> + >> +/** >> + * i915_gem_object_wait_migration - Sync an accelerated migration >> operation >> + * @obj: The migrating object. >> + * @flags: waiting flags. Currently supports only >> I915_WAIT_INTERRUPTIBLE. >> + * >> + * Wait for any pending async migration operation on the object, >> + * whether it's explicitly (i915_gem_object_migrate()) or implicitly >> + * (swapin, initial clearing) initiated. >> + * >> + * Return: 0 if successful, -ERESTARTSYS if a signal was hit during >> waiting. >> + */ >> +int i915_gem_object_wait_migration(struct drm_i915_gem_object *obj, >> +                   unsigned int flags) >> +{ >> +    might_sleep(); >> +    /* NOP for now. */ >> +    return 0; >> +} >>