From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Fix rps irq warning Date: Sun, 04 Sep 2011 10:03:21 +0100 Message-ID: References: <1315106655-26782-1-git-send-email-ben@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 93B74A08C7 for ; Sun, 4 Sep 2011 02:03:28 -0700 (PDT) In-Reply-To: <1315106655-26782-1-git-send-email-ben@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Daniel Vetter , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Sat, 3 Sep 2011 20:24:15 -0700, Ben Widawsky wrote: > I couldn't reproduce this one, but... Interrupt mask state is lost if > three interrupts occur before the workqueue has run. > > Should be straight forward to reproduce even without SMP. I'm pretty > sure Dan Vetter was trying to explain this to me, and I couldn't get it. > My solution I think is different than his though. This logic is now duplicated in ivybridge_irq_handler(). This simply fits the scenario Daniel described, whilst also fitting in with our understanding of IMR, IER and IIR. (A big assumption ;-) Reported-by: Soeren Sonnenburg Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre