From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/2] drm/i915: collect per ring page fault info on error Date: Tue, 20 Sep 2011 10:42:52 +0100 Message-ID: References: <1316459275-6292-1-git-send-email-ben@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 92A1C9E963 for ; Tue, 20 Sep 2011 02:43:07 -0700 (PDT) In-Reply-To: <1316459275-6292-1-git-send-email-ben@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Mon, 19 Sep 2011 12:07:54 -0700, Ben Widawsky wrote: > Signed-off-by: Ben Widawsky These are a nice set of cleanups and the extra fault reporting may come in handy. (I thought that fault register was to be used in conjunction with ppgtt in order for the gpu to fault in pages...) As Daniel mentioned we need to include the VCS for the acthd_stuck() check. I mentioned that I thought the general ERROR register was actually per-ring, but checking the specs I don't see it replicated. The only silly thing is that this introduces an array of register values for only some of the per-ring registers, hence a bit of inconsistency and just calling out for a complete overhaul of those per-ring structures and hopefully code reduction ;-) Per-ring per-gen hangcheck/error recording/error reporting may be useful. More likely overkill. ;-) -Chris -- Chris Wilson, Intel Open Source Technology Centre