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bh=MdfRQUMOQhxhhJkCBBPqXhzrGY18rGzkim3POk4UUZ4=; b=WYaih0Pgc7v4AnVPJip3L2KOauaxA0mnb+/tIClVuOzak5b+AyBmL5HauY7E0vugM4uxzBF5TEqYyIlXXy13+SGWLkgmh6vv+/jogu1gy9uVzodDFGKHukRCn7OpRD4b30vjAI3HN+GbJfSCv/w6rzSS98gEUQat2fbB2ExNo/Q= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Fri, 19 Jun 2026 11:48:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2.5] xen/arm: gic: defer host LPI allocation until after ITS init From: "Orzel, Michal" To: Mykola Kvach , CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , Oleksii Kurochko , Luca Fancellu , "Mykola Kvach" , Oleksandr Tyshchenko References: <112419d3ea48ca328849c8f6647909d3eb667b40.1779922874.git.mykola_kvach@epam.com> <341edd8de63dcd84ccc6e7b6c03e9e8fc7105184.1781847061.git.mykola_kvach@epam.com> <7a0a1867-8316-4e20-971e-fab99c9f4a32@amd.com> Content-Language: en-US In-Reply-To: <7a0a1867-8316-4e20-971e-fab99c9f4a32@amd.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Fh/tU5FZ8ivVtwSlEyYTQtR1ZMJ+4gYcXwZF4s/hoEV4ytsw7xzfzjSGyxHgQo9LkPNEE7DCD4dyshRNVqrbAh4t6ABJvVJJolbQELqcXRvzAWJVzhGZ7oUcfHJaMM6CO2cvngV/1l8ROaqbt2EmWlZ8Bmv7RS4ZR3THkFtQvjJZZceBlkWoRocMwLmO3y8Mgyx4ABcsyMrlUQmvbxpmlbJGy6ao+GskNZv4KiBlmwXyLtN4YbDIt4jJnpoReUfrmZ9/HIejAM6H6wCDcU3LpWqRpe+/936g8jXcLgUdjYHb5jQhLYjz3dKAnYNJciyYV4mAaslvybCaxnpNfOvnvDJ8cnVv/5QksCbAucvHSHwBqcUy6qa1aaVo5j1NHnGGQ89iyK4eq5n1vvc+aFAjLtCm0tU+Sb4ehz/Cgt//OLqh6VwIEv8Nn6Dk6tvLNIFy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jun 2026 09:48:09.7426 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bdec211f-9771-4961-e1b0-08decde7df21 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR12MB9590 X-purgate-ID: tlsNG-bad1c0/1781862497-71BFE744-50C529EA/0/0 X-purgate-type: clean X-purgate-size: 1843 @Oleksii, can we ask for a release ack here? ~Michal On 19-Jun-26 08:09, Orzel, Michal wrote: > > > On 19-Jun-26 07:45, Mykola Kvach wrote: >> gicv3_lpi_init_host_lpis() allocates host LPI state, including the >> host LPI lookup table, CPU notifier state and the boot CPU pending table. >> Those allocations use gicv3_its_get_memflags(). >> >> ITS quirks are discovered by gicv3_its_init(), so allocating host LPI >> state from gicv3_dist_init() can happen before the memory restrictions >> required by the ITS are known. On affected systems this can leave >> Redistributor LPI state allocated and programmed with the default memory >> policy. >> >> Move host LPI initialization after gicv3_its_init(), and only run it when >> a host ITS was found. The old call ignored the return value. Now that the >> call is made from gicv3_init(), check it and panic on failure because >> Redistributor LPI initialization relies on that state being available. >> >> This also narrows the condition for host LPI initialization from >> "GICD advertises LPIs" to "a host ITS was discovered". This is >> intentional: Xen currently has no supported LPI path without a host ITS, >> and gicv3_lpi_init_rdist() already rejects that case with -ENODEV. >> Therefore, on systems where GICD_TYPE_LPIS is set but no host ITS is >> present, skipping gicv3_lpi_init_host_lpis() only avoids allocating host >> LPI state that cannot be used by a supported Xen LPI path. >> >> Fixes: dcb6cb263689 ("ARM: GICv3 ITS: introduce host LPI array") >> Fixes: 751ec850ec1d ("ARM: ITS: implement quirks and add support for Renesas Gen4 ITS") >> Signed-off-by: Mykola Kvach >> Reviewed-by: Oleksandr Tyshchenko > Reviewed-by: Michal Orzel > > ~Michal > >