From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, bhelgaas@google.com,
manivannan.sadhasivam@linaro.org, kw@linux.com,
cassel@kernel.org, robh@kernel.org, jingoohan1@gmail.com,
linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v12 1/6] PCI: Introduce generic bus config read helper function
Date: Tue, 3 Jun 2025 12:21:46 +0300 (EEST) [thread overview]
Message-ID: <e486d187-e869-98b5-a0cb-8bd463540312@linux.intel.com> (raw)
In-Reply-To: <d6eeb0b5-53b3-5c40-00df-f79aa2619711@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 2878 bytes --]
On Tue, 3 Jun 2025, Ilpo Järvinen wrote:
> On Thu, 15 May 2025, Hans Zhang wrote:
>
> > The primary PCI config space accessors are tied to the size of the read
> > (byte/word/dword). Upcoming refactoring of PCI capability discovery logic
> > requires passing a config accessor function that must be able to perform
> > read with different sizes.
> >
> > Add any size config space read accessor pci_bus_read_config() to allow
> > giving it as the config space accessor to the upcoming PCI capability
> > discovery macro.
> >
> > Reconstructs the PCI function discovery logic to prepare for unified
> > configuration of access modes. No function changes are intended.
> >
> > Signed-off-by: Hans Zhang <18255117159@163.com>
> > ---
> > Changes since v9 ~ v11:
> > - None
> >
> > Changes since v8:
> > - The new split is patch 1/6.
> > - The patch commit message were modified.
> > ---
> > drivers/pci/access.c | 17 +++++++++++++++++
> > drivers/pci/pci.h | 2 ++
> > 2 files changed, 19 insertions(+)
> >
> > diff --git a/drivers/pci/access.c b/drivers/pci/access.c
> > index b123da16b63b..603332658ab3 100644
> > --- a/drivers/pci/access.c
> > +++ b/drivers/pci/access.c
> > @@ -85,6 +85,23 @@ EXPORT_SYMBOL(pci_bus_write_config_byte);
> > EXPORT_SYMBOL(pci_bus_write_config_word);
> > EXPORT_SYMBOL(pci_bus_write_config_dword);
> >
> > +int pci_bus_read_config(void *priv, unsigned int devfn, int where, u32 size,
> > + u32 *val)
> > +{
> > + struct pci_bus *bus = priv;
> > + int ret;
> > +
> > + if (size == 1)
> > + ret = pci_bus_read_config_byte(bus, devfn, where, (u8 *)val);
> > + else if (size == 2)
> > + ret = pci_bus_read_config_word(bus, devfn, where, (u16 *)val);
> > + else
> > + ret = pci_bus_read_config_dword(bus, devfn, where, val);
>
> Perhaps this should check also size == 4 and return
> PCIBIOS_BAD_REGISTER_NUMBER in case size is wrong.
>
> > +
> > + return ret;
I'd also forgo ret variable and return directly.
> > +}
> > +EXPORT_SYMBOL_GPL(pci_bus_read_config);
>
> Does this even need to be exported? Isn't the capability search always
> built in?
>
> > int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
> > int where, int size, u32 *val)
> > {
> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > index b81e99cd4b62..5e1477d6e254 100644
> > --- a/drivers/pci/pci.h
> > +++ b/drivers/pci/pci.h
> > @@ -88,6 +88,8 @@ extern bool pci_early_dump;
> > bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
> > bool pcie_cap_has_lnkctl2(const struct pci_dev *dev);
> > bool pcie_cap_has_rtctl(const struct pci_dev *dev);
> > +int pci_bus_read_config(void *priv, unsigned int devfn, int where, u32 size,
> > + u32 *val);
> >
> > /* Functions internal to the PCI core code */
> >
> >
>
>
--
i.
next prev parent reply other threads:[~2025-06-03 9:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 16:12 [PATCH v12 0/6] Refactor capability search into common macros Hans Zhang
2025-05-14 16:12 ` [PATCH v12 1/6] PCI: Introduce generic bus config read helper function Hans Zhang
2025-06-03 9:18 ` Ilpo Järvinen
2025-06-03 9:21 ` Ilpo Järvinen [this message]
2025-06-03 15:41 ` Hans Zhang
2025-06-03 15:40 ` Hans Zhang
2025-05-14 16:12 ` [PATCH v12 2/6] PCI: Clean up __pci_find_next_cap_ttl() readability Hans Zhang
2025-06-03 9:30 ` Ilpo Järvinen
2025-06-03 15:42 ` Hans Zhang
2025-05-14 16:12 ` [PATCH v12 3/6] PCI: Refactor capability search into common macros Hans Zhang
2025-06-03 9:38 ` Ilpo Järvinen
2025-06-03 15:55 ` Hans Zhang
2025-05-14 16:12 ` [PATCH v12 4/6] PCI: dwc: Use common PCI host bridge APIs for finding the capabilities Hans Zhang
2025-06-03 9:42 ` Ilpo Järvinen
2025-06-03 15:58 ` Hans Zhang
2025-05-14 16:12 ` [PATCH v12 5/6] PCI: cadence: " Hans Zhang
2025-05-14 16:12 ` [PATCH v12 6/6] PCI: cadence: Use cdns_pcie_find_*capability to avoid hardcode Hans Zhang
2025-06-03 9:49 ` Ilpo Järvinen
2025-06-03 16:00 ` Hans Zhang
2025-05-26 14:53 ` [PATCH v12 0/6] Refactor capability search into common macros Hans Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e486d187-e869-98b5-a0cb-8bd463540312@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=18255117159@163.com \
--cc=bhelgaas@google.com \
--cc=cassel@kernel.org \
--cc=jingoohan1@gmail.com \
--cc=kw@linux.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.