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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381c10e725dsm16275267f8f.56.2024.11.05.05.42.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 Nov 2024 05:42:50 -0800 (PST) Message-ID: Date: Tue, 5 Nov 2024 14:42:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] drm/amdgpu: Bypass resizing bars for PVH dom0 To: Jiqian Chen , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , Xinhui Pan Cc: amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Pierre-Eric Pelloux-Prayer , Huang Rui References: <20241105060531.3503788-1-Jiqian.Chen@amd.com> <20241105060531.3503788-3-Jiqian.Chen@amd.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20241105060531.3503788-3-Jiqian.Chen@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 05.11.24 um 07:05 schrieb Jiqian Chen: > VPCI of Xen doesn't support resizable bar. When discrete GPU is used on > PVH dom0 which using the VPCI, amdgpu fails to probe, so we need to > disable this capability for PVH dom0. What do you mean VPCI doesn't support resizeable BAR? This is mandatory to be supported or otherwise general PCI resource assignment won't work either. In other words you can't hotplug something if that here doesn't work either. Regards, Christian. > > Signed-off-by: Jiqian Chen > Reviewed-by: Huang Rui > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index b3fb92bbd9e2..012feb3790dd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -1619,6 +1619,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev) > if (!IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT)) > return 0; > > + /* Bypass for PVH dom0 which doesn't support resizable bar */ > + if (xen_initial_domain() && xen_pvh_domain()) > + return 0; > + > /* Bypass for VF */ > if (amdgpu_sriov_vf(adev)) > return 0;