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[2003:ea:8f4a:6300:40b2:575f:21ab:316e]) by smtp.googlemail.com with ESMTPSA id 5sm3722734wrh.5.2019.12.11.13.20.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Dec 2019 13:20:38 -0800 (PST) Subject: Re: phylib's new dynamic feature detection seems too early To: Russell King - ARM Linux admin , Andrew Lunn , Florian Fainelli Cc: netdev@vger.kernel.org References: <20191210171536.GW25745@shell.armlinux.org.uk> From: Heiner Kallweit Message-ID: Date: Wed, 11 Dec 2019 22:20:33 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.9.1 MIME-Version: 1.0 In-Reply-To: <20191210171536.GW25745@shell.armlinux.org.uk> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 10.12.2019 18:15, Russell King - ARM Linux admin wrote: > Hi, > > Back in dcdecdcfe1fc ("net: phy: switch drivers to use dynamic feature > detection"), Heiner switched a bunch of PHYs over to using his > wonderful new idea of reading the PHY capabilities from the registers. > However, this is flawed. > > The features are read from the PHY shortly after the PHY driver is > bound to the device, while the PHY is in its default pin-strapped > defined mode. PHYs such as the 88E1111 set their capabilities according > to the pin-strapped host interface mode. > > If the 88E1111 is pin-strapped for a 1000base-X host interface, then it > indicates that it is not capable of 100M or 10M modes - which is > entirely sensible. > > However, the SFP support will switch the PHY into SGMII mode, where the > PHY will support 100M and 10M modes. Indeed, reading the PHY registers > using mii-diag after initialisation reports that the PHY supports these > speeds. > > This switch happens in the Marvell PHY driver when the config_init() > method is called, via phy_init_hw() and phy_attach_direct() - which > is where the MAC driver configures the PHY for its requested interface > mode. > > Therefore, the features dynamically read from the PHY are entirely > meaningless, until the PHY interface mode has been properly set. > > This means that SFP modules, such as Champion One 1000SFPT and a > multitude of others which default to a 1000base-X interface end up > only advertising 1000baseT despite being switched to SGMII mode and > actually supporting 100M and 10M speeds - and that can't be changed > via ethtool as the support mask doesn't allow the other speeds. > > Thoughts how to get around this? > Before reading PHY capabilities from the registers the capabilities were completely static, I don't think this was better. The capabilities read in phy_probe() are correct for the default interface mode. And for all PHY drivers not implementing config_init() we have to read the capabilities in phy_probe(). In case the capabilities can change in config_init() a first thought would be to clear supported/advertised and re-read the capabilities at the end of config_init(). Heiner