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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, uma.shankar@intel.com,
	chaitanya.kumar.borah@intel.com, pranay.samala@intel.com
Subject: Re: [PATCH v3 3/4] drm/i915: Avoid programming color HW blocks for NV12 Y planes
Date: Tue, 12 May 2026 13:51:34 +0300	[thread overview]
Message-ID: <e6f018b234eec50c96035973f9028af74acb3feb@intel.com> (raw)
In-Reply-To: <20260511053213.3122314-4-chaitanya.kumar.borah@intel.com>

On Mon, 11 May 2026, Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> link_nv12_planes() currently copies the full UV plane hw state to
> the Y plane. This includes the color pipeline blobs (ctm, degamma_lut,
> gamma_lut, lut_3d) which is incorrect as we don't need to program these
> HW blocks for Y plane.
>
> This is harmless currently as the color pipeline uapi does not support
> YUV (both packed and planar) formats but that can change in the future.
>
> Add a new static helper intel_plane_y_copy_hw_state() that copies only
> the rendering parameters a Y plane actually needs, leaving all color
> pipeline blobs unset. Remove the helper intel_plane_copy_hw_state() as
> there are no users for it.
>
> Assisted-by: GitHub Copilot:Claude Sonnet 4.6
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_plane.c | 26 +++++++++++++---------
>  drivers/gpu/drm/i915/display/intel_plane.h |  2 --
>  2 files changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index a8efe0011b23..559eef467dda 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -450,16 +450,22 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_atomic_state *state,
>  	intel_plane_color_copy_uapi_to_hw_state(state, plane_state, from_plane_state, crtc);
>  }
>  
> -void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> -			       const struct intel_plane_state *from_plane_state)
> +static void intel_plane_y_copy_hw_state(struct intel_plane_state *y_plane_state,
> +					const struct intel_plane_state *uv_plane_state)
>  {
> -	intel_plane_clear_hw_state(plane_state);
> -
> -	memcpy(&plane_state->hw, &from_plane_state->hw,
> -	       sizeof(plane_state->hw));
> -
> -	if (plane_state->hw.fb)
> -		drm_framebuffer_get(plane_state->hw.fb);
> +	intel_plane_clear_hw_state(y_plane_state);
> +
> +	y_plane_state->hw.crtc		= uv_plane_state->hw.crtc;
> +	y_plane_state->hw.fb		= uv_plane_state->hw.fb;
> +	if (y_plane_state->hw.fb)
> +		drm_framebuffer_get(y_plane_state->hw.fb);
> +
> +	y_plane_state->hw.alpha		= uv_plane_state->hw.alpha;
> +	y_plane_state->hw.pixel_blend_mode = uv_plane_state->hw.pixel_blend_mode;
> +	y_plane_state->hw.rotation	= uv_plane_state->hw.rotation;
> +	y_plane_state->hw.color_encoding = uv_plane_state->hw.color_encoding;
> +	y_plane_state->hw.color_range	= uv_plane_state->hw.color_range;
> +	y_plane_state->hw.scaling_filter = uv_plane_state->hw.scaling_filter;

Please drop the extra spaces before ='s.

BR,
Jani.

>  }
>  
>  static void unlink_nv12_plane(struct intel_crtc_state *crtc_state,
> @@ -1549,7 +1555,7 @@ static void link_nv12_planes(struct intel_crtc_state *crtc_state,
>  	crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id];
>  
>  	/* Copy parameters to Y plane */
> -	intel_plane_copy_hw_state(y_plane_state, uv_plane_state);
> +	intel_plane_y_copy_hw_state(y_plane_state, uv_plane_state);
>  	y_plane_state->uapi.src = uv_plane_state->uapi.src;
>  	y_plane_state->uapi.dst = uv_plane_state->uapi.dst;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.h b/drivers/gpu/drm/i915/display/intel_plane.h
> index 9d627d321f2e..a5bb0caa54a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_plane.h
> @@ -39,8 +39,6 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_atomic_state *state,
>  				       struct intel_plane_state *plane_state,
>  				       const struct intel_plane_state *from_plane_state,
>  				       struct intel_crtc *crtc);
> -void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> -			       const struct intel_plane_state *from_plane_state);
>  void intel_plane_async_flip(struct intel_dsb *dsb,
>  			    struct intel_plane *plane,
>  			    const struct intel_crtc_state *crtc_state,

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-05-12 10:51 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11  5:32 [PATCH v3 0/4] More Fixes for color pipeline Chaitanya Kumar Borah
2026-05-11  5:32 ` [PATCH v3 1/4] drm/i915/display: Copy color pipeline from plane in the primary joiner pipe Chaitanya Kumar Borah
2026-05-12  9:58   ` Shankar, Uma
2026-05-11  5:32 ` [PATCH v3 2/4] drm/i915/display: Don’t use atomic state back-pointer to derive color pipeline Chaitanya Kumar Borah
2026-05-11  5:32 ` [PATCH v3 3/4] drm/i915: Avoid programming color HW blocks for NV12 Y planes Chaitanya Kumar Borah
2026-05-12 10:51   ` Jani Nikula [this message]
2026-05-11  5:32 ` [PATCH v3 4/4] drm/i915: Fix color blob reference handling in intel_plane_state Chaitanya Kumar Borah
2026-05-11 13:35 ` ✗ CI.checkpatch: warning for More Fixes for color pipeline Patchwork
2026-05-11 13:38 ` ✓ CI.KUnit: success " Patchwork
2026-05-11 14:47 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-11 16:02 ` ✓ Xe.CI.FULL: " Patchwork
2026-05-11 16:59 ` ✓ i915.CI.BAT: " Patchwork
2026-05-11 22:53 ` ✗ i915.CI.Full: failure " Patchwork
2026-05-12 14:16 ` ✓ i915.CI.Full: success " Patchwork

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