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[92.88.170.63]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b658c87sm8110604f8f.9.2025.03.30.01.55.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 30 Mar 2025 01:55:25 -0700 (PDT) Message-ID: Date: Sun, 30 Mar 2025 10:55:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] hw/char/bcm2835_aux: Fix incorrect interrupt ID when RX disabled To: Chung-Yi Chen , qemu-arm@nongnu.org Cc: peter.maydell@linaro.org, marcandre.lureau@redhat.com, pbonzini@redhat.com, qemu-devel@nongnu.org References: <20250328123725.94176-1-yeechen0207@gmail.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250328123725.94176-1-yeechen0207@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: 5/unBcRyRzNg On 28/3/25 13:37, Chung-Yi Chen wrote: > This patch fixes a misconfiguration issue in the read implementation of > the AUX_MU_IIR_REG register. This issue can lead to a transmit interrupt > being incorrectly interpreted as a receive interrupt when the receive > interrupt is disabled and the receive FIFO holds valid bytes. > > The AUX_MU_IIR_REG register (interrupt ID bits [2:1]) indicates the > status of mini UART interrupts: > > - 00: No interrupts > - 01: Transmit FIFO is empty > - 10: Receive FIFO is not empty > - 11: > > When the transmit interrupt is enabled and the receive interrupt is > disabled, the original code incorrectly sets the interrupt ID bits. > Specifically: > > 1. Transmit FIFO empty, receive FIFO empty > - Expected 0b01, returned 0b01 (correct) > 2. Transmit FIFO empty, receive FIFO not empty > - Expected 0b01, returned 0b10 (incorrect) > > In the second case, the code sets the interrupt ID to 0b10 (receive FIFO > is not empty) even if the receive interrupt is disabled. > > To fix this, the patch adds additional condition for setting the > interrupt ID bits to also check if the receive interrupt is enabled. > > Reference: BCM2835 ARM Peripherals, page 13. Available on > https://datasheets.raspberrypi.com/bcm2835/bcm2835-peripherals.pdf > > Signed-off-by: Chung-Yi Chen > --- > hw/char/bcm2835_aux.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Fixes: 97398d900ca ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Reviewed-by: Philippe Mathieu-Daudé