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Mon, 19 May 2025 05:48:17 -0700 (PDT) Received: from [192.168.68.110] ([152.250.131.100]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-52dbab4e983sm6534167e0c.31.2025.05.19.05.48.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 May 2025 05:48:17 -0700 (PDT) Message-ID: Date: Mon, 19 May 2025 09:48:14 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] target: riscv: Fix satp mode initialization based on profile To: Alexandre Ghiti , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , qemu-riscv@nongnu.org, qemu-devel@nongnu.org References: <20250516122319.4100121-1-alexghiti@rivosinc.com> Content-Language: en-US From: Daniel Henrique Barboza In-Reply-To: <20250516122319.4100121-1-alexghiti@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::a32; envelope-from=dbarboza@ventanamicro.com; helo=mail-vk1-xa32.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org On 5/16/25 9:23 AM, Alexandre Ghiti wrote: > The satp mode is set using the svXX properties, but that actually > restricts the satp mode to the minimum required by the profile and > prevents the use of higher satp modes. For rva23s64, in "Optional Extensions" we'll find: https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc - Sv48 Page-based 48-bit virtual-memory system. - Sv57 Page-based 57-bit virtual-memory system. So in theory we could go up to sv57 for rva23s64 (and rva22s64, just checked). Changing satp_mode to the maximum allowed seems sensible. But allowing all satp modes to go in a profile defeats the purpose, doesn't it? None of the existing profiles in QEMU claims supports sv64. Granted, I'm not a satp expert, but removing the satp restriction in profiles doesn't seem right. Thanks, Daniel > > Fix this by not setting any svXX property and allow all satp mode to be > supported. > > Signed-off-by: Alexandre Ghiti > --- > target/riscv/tcg/tcg-cpu.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index 5aef9eef36..ca2d2950eb 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -1232,9 +1232,6 @@ static void cpu_set_profile(Object *obj, Visitor *v, const char *name, > #ifndef CONFIG_USER_ONLY > if (profile->satp_mode != RISCV_PROFILE_ATTR_UNUSED) { > object_property_set_bool(obj, "mmu", true, NULL); > - const char *satp_prop = satp_mode_str(profile->satp_mode, > - riscv_cpu_is_32bit(cpu)); > - object_property_set_bool(obj, satp_prop, profile->enabled, NULL); > } > #endif >