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From: William Zhang <william.zhang@broadcom.com>
To: "Linus Walleij" <linus.walleij@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Anand Gore" <anand.gore@broadcom.com>,
	"Kursad Oney" <kursad.oney@broadcom.com>,
	"Florian Fainelli" <florian.fainelli@broadcom.com>,
	"Rafał Miłecki" <rafal@milecki.pl>,
	"Broadcom internal kernel review list"
	<bcm-kernel-feedback-list@broadcom.com>,
	"Olivia Mackall" <olivia@selenic.com>,
	"Ray Jui" <rjui@broadcom.com>,
	"Scott Branden" <sbranden@broadcom.com>,
	"Florian Fainelli" <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-crypto@vger.kernel.org
Subject: RE: [PATCH v2 05/12] ARM: dts: bcm6878: Add BCMBCA peripherals
Date: Fri, 25 Apr 2025 18:04:24 -0700	[thread overview]
Message-ID: <ea6ada77d0ac1a6cc7cf6da5aef33806@mail.gmail.com> (raw)
In-Reply-To: <20250406-bcmbca-peripherals-arm-v2-5-22130836c2ed@linaro.org>

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> -----Original Message-----
> From: Linus Walleij <linus.walleij@linaro.org>
> Sent: Sunday, April 6, 2025 8:33 AM
> To: Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>;
> Conor Dooley <conor+dt@kernel.org>; William Zhang
> <william.zhang@broadcom.com>; Anand Gore <anand.gore@broadcom.com>;
> Kursad Oney <kursad.oney@broadcom.com>; Florian Fainelli
> <florian.fainelli@broadcom.com>; Rafał Miłecki <rafal@milecki.pl>;
> Broadcom
> internal kernel review list <bcm-kernel-feedback-list@broadcom.com>;
> Olivia
> Mackall <olivia@selenic.com>; Ray Jui <rjui@broadcom.com>; Scott Branden
> <sbranden@broadcom.com>; Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-
> crypto@vger.kernel.org; Linus Walleij <linus.walleij@linaro.org>
> Subject: [PATCH v2 05/12] ARM: dts: bcm6878: Add BCMBCA peripherals
>
> All the BCMBCA SoCs share a set of peripherals at 0xff800000,
> albeit at slightly varying memory locations on the bus and
> with varying IRQ assignments.
>
> Add the first and second watchdog, GPIO, RNG, LED and
> DMA blocks for the BCM6878 based on the vendor files
> 6878_map_part.h and 6878_intr.h from the "bcmopen-consumer"
> code drop.
>
> This SoC has up to 256 possible GPIOs due to having 8
> registers with 32 GPIOs in each available.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm6878.dtsi | 118
> ++++++++++++++++++++++++++++++++
>  1 file changed, 118 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> index
> cf378970db08c05c40564a38931417a7be759532..f317fc888da0ef449d9b515367
> 7e6dadd869a7db 100644
> --- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> @@ -108,6 +108,111 @@ bus@ff800000 {
>  		#size-cells = <1>;
>  		ranges = <0 0xff800000 0x800000>;
>
> +		watchdog@480 {
> +			compatible = "brcm,bcm6345-wdt";
> +			reg = <0x480 0x10>;
> +		};
> +
> +		watchdog@4c0 {
> +			compatible = "brcm,bcm6345-wdt";
> +			reg = <0x4c0 0x10>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 0 .. 31 */
> +		gpio0: gpio@500 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x500 0x04>, <0x520 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 32 .. 63 */
> +		gpio1: gpio@504 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x504 0x04>, <0x524 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 64 .. 95 */
> +		gpio2: gpio@508 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x508 0x04>, <0x528 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 96 .. 127 */
> +		gpio3: gpio@50c {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x50c 0x04>, <0x52c 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 128 .. 159 */
> +		gpio4: gpio@510 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x510 0x04>, <0x530 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 160 .. 191 */
> +		gpio5: gpio@514 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x514 0x04>, <0x534 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 192 .. 223 */
> +		gpio6: gpio@518 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x518 0x04>, <0x538 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 224 .. 255 */
> +		gpio7: gpio@51c {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x51c 0x04>, <0x53c 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		rng@b80 {
> +			compatible = "brcm,iproc-rng200";
> +			reg = <0xb80 0x28>;
> +			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
Interrupt number is 85

> +		};
> +
> +		leds: led-controller@700 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "brcm,bcm63138-leds";
> +			reg = <0x700 0xdc>;
> +			status = "disabled";
> +		};
> +
>  		hsspi: spi@1000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -134,6 +239,19 @@ nandcs: nand@0 {
>  			};
>  		};
>
> +		pl081_dma: dma-controller@11000 {
> +			compatible = "arm,pl081", "arm,primecell";
> +			// The magic B105F00D info is missing
> +			arm,primecell-periphid = <0x00041081>;
> +			reg = <0x11000 0x1000>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			memcpy-burst-size = <256>;
> +			memcpy-bus-width = <32>;
> +			clocks = <&periph_clk>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <2>;
> +		};
> +
>  		uart0: serial@12000 {
>  			compatible = "arm,pl011", "arm,primecell";
>  			reg = <0x12000 0x1000>;
>
> --
> 2.49.0

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  parent reply	other threads:[~2025-04-26  1:06 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-06 15:32 [PATCH v2 00/12] ARM: bcm: Add some BCMBCA peripherals Linus Walleij
2025-04-06 15:32 ` [PATCH v2 01/12] ARM: dts: bcm6878: Correct UART0 IRQ number Linus Walleij
2025-04-11 23:42   ` Florian Fainelli
2025-04-26  0:57   ` William Zhang
2025-04-26  0:57     ` William Zhang
2025-04-06 15:32 ` [PATCH v2 02/12] dt-bindings: rng: r200: Add interrupt property Linus Walleij
2025-04-11 23:42   ` Florian Fainelli
2025-04-06 15:32 ` [PATCH v2 03/12] ARM: dts: bcm6846: Add interrupt to RNG Linus Walleij
2025-04-11 23:42   ` Florian Fainelli
2025-04-26  1:00   ` William Zhang
2025-04-06 15:32 ` [PATCH v2 04/12] ARM: dts: bcm6855: Add BCMBCA peripherals Linus Walleij
2025-04-11 23:42   ` Florian Fainelli
2025-04-06 15:32 ` [PATCH v2 05/12] ARM: dts: bcm6878: " Linus Walleij
2025-04-11 23:42   ` Florian Fainelli
2025-04-26  1:04   ` William Zhang [this message]
2025-04-06 15:32 ` [PATCH v2 06/12] ARM: dts: bcm63138: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-06 15:32 ` [PATCH v2 07/12] ARM: dts: bcm63148: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-06 15:32 ` [PATCH v2 08/12] ARM: dts: bcm63178: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-06 15:32 ` [PATCH v2 09/12] ARM64: dts: bcm4908: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-26  1:12   ` William Zhang
2025-04-06 15:32 ` [PATCH v2 10/12] ARM64: dts: bcm6856: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-26  1:13   ` William Zhang
2025-04-06 15:32 ` [PATCH v2 11/12] ARM64: dts: bcm6858: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-26  1:16   ` William Zhang
2025-04-06 15:32 ` [PATCH v2 12/12] ARM64: dts: bcm63158: " Linus Walleij
2025-04-11 23:43   ` Florian Fainelli
2025-04-26  1:22   ` William Zhang
2025-04-07 12:47 ` [PATCH v2 00/12] ARM: bcm: Add some " Rob Herring (Arm)
2025-04-26  8:49 ` Florian Fainelli
2025-05-10  1:11   ` William Zhang
2025-05-12 12:06     ` Linus Walleij

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