From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A67AC433FE for ; Tue, 1 Nov 2022 17:28:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230272AbiKAR2S (ORCPT ); Tue, 1 Nov 2022 13:28:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230201AbiKAR2Q (ORCPT ); Tue, 1 Nov 2022 13:28:16 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F4A91BE88; Tue, 1 Nov 2022 10:28:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667323695; x=1698859695; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=VFejJjY7MiidTegb+vMmaxtoV5hFMMRO08m+qjXqBVM=; b=eHzvbnRkFryR5YcKVeFOb5LTOAOOiGzNoI0ieKLEqd23Zkn8PxdRiYOC JU0MrXaCMHWUOeki7GLeNDj0gzZkPV14niWPWx5bIKcIN5JrUZZWIQquJ 5NgJIV6n5ZZlgZqC3hKdcdnLzGi303k+psFnHoXm8bt9UT4eXA/yOjjn3 HAoLhMFySVzUpacrveK+4PwB75T7XAJICTFeTk45KliNP4arZGNsuqU2P gPsygsjRZZFIKn7Uy+ptpReOYOztMUTLEbHaISQbYAIGM7RfqLqc5ZbrK gwNJyhku/czWiEq+czN75hjQNnAZi1MSLTvgMyrHBuJpLX3oHUsLcRoUn Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10518"; a="371277276" X-IronPort-AV: E=Sophos;i="5.95,231,1661842800"; d="scan'208";a="371277276" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2022 10:28:14 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10518"; a="723233811" X-IronPort-AV: E=Sophos;i="5.95,231,1661842800"; d="scan'208";a="723233811" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.252.55.64]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2022 10:28:11 -0700 Message-ID: Date: Tue, 1 Nov 2022 19:28:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Firefox/102.0 Thunderbird/102.4.1 Subject: Re: [PATCH V5 00/26] Add support UHS-II for GL9755 Content-Language: en-US To: Victor Shih , ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, takahiro.akashi@linaro.org, dlunev@chromium.org, Victor Shih References: <20221019110647.11076-1-victor.shih@genesyslogic.com.tw> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20221019110647.11076-1-victor.shih@genesyslogic.com.tw> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org On 19/10/22 14:06, Victor Shih wrote: > Summary > ======= > These patches[1] support UHS-II and fix GL9755 UHS-II compatibility. > > About UHS-II, roughly deal with the following three parts: > 1) A UHS-II detection and initialization: > - Host setup to support UHS-II (Section 3.13.1 Host Controller Setup Sequence > [2]). > - Detect a UHS-II I/F (Section 3.13.2 Card Interface Detection Sequence[2]). > - In step(9) of Section 3.13.2 in [2], UHS-II initialization is include Section > 3.13.3 UHS-II Card Initialization and Section 3.13.4 UHS-II Setting Register > Setup Sequence. > > 2) Send Legacy SD command through SD-TRAN > - Encapsulated SD packets are defined in SD-TRAN in order to ensure Legacy SD > compatibility and preserve Legacy SD infrastructures (Section 7.1.1 Packet > Types and Format Overview[3]). > - Host issue a UHS-II CCMD packet or a UHS-II DCMD (Section 3.13.5 UHS-II > CCMD Packet issuing and Section 3.13.6 UHS-II DCMD Packet issuing[2]). > > 3) UHS-II Interrupt > - Except for UHS-II error interrupts, most interrupts share the original > interrupt registers. > > Patch structure > =============== > patch#1-#6: for core > patch#7-#25: for sdhci > patch#26: for GL9755 Thanks for putting this together. I haven't looked at all the patches, but have requested quite a lot of small changes, so there should be enough to be going on with for now.