From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: rva333@protonmail.com, Jassi Brar <jassisinghbrar@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Houlong Wei <houlong.wei@mediatek.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 2/3] soc: mediatek: cmdq-helper: add legacy GCE ISA support
Date: Tue, 28 Jul 2026 17:08:44 +0200 [thread overview]
Message-ID: <ebf419fc-24a8-472f-8996-a134ece69f21@collabora.com> (raw)
In-Reply-To: <20260728-6572-gce-v1-2-750bba32689e@protonmail.com>
On 7/28/26 11:42, Roman Vivchar via B4 Relay wrote:
> From: Roman Vivchar <rva333@protonmail.com>
>
> Some SoCs, such as mt6572, have different WRITE and POLL instruction
> encoding. Instead of 16-bit offset and 8-bit subsystem ID, old GCEs have
> 22-bit offset and 2-bit subsystem ID.
What about poll_addr, mask, write_s, write_s_mask and others?
Not sure that this will actually work reliably (though I'm sure you're not
creating any regression).
>
> Extend cmdq_instruction struct with additional union and struct to hold
> the legacy format of instruction encoding. Add legacy_isa to select
> legacy GCE ISA when writing instruction. Finally, add special handing
> for legacy_isa cases.
>
> While mt6572 GCE supports 22-bit offsets, the parameter type for offset
> remains 16 bit, because all mt6572 GCE mmsys consumers are in the 0xffff
> range.
>
> Signed-off-by: Roman Vivchar <rva333@protonmail.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 55 ++++++++++++++++++++++----------
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> 2 files changed, 39 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index f8ee6c9ade89..094732405080 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -31,18 +31,27 @@ struct cmdq_instruction {
> };
> };
> union {
> - u16 offset;
> - u16 event;
> - u16 reg_dst;
> - };
> - union {
> - u8 subsys;
> struct {
> - u8 sop:5;
> - u8 arg_c_t:1;
> - u8 src_t:1;
> - u8 dst_t:1;
> - };
> + union {
> + u16 offset;
> + u16 event;
> + u16 reg_dst;
> + };
> + union {
> + u8 subsys;
> + struct {
> + u8 sop:5;
> + u8 arg_c_t:1;
> + u8 src_t:1;
> + u8 dst_t:1;
> + };
> + };
> + } __packed;
> +
> + struct {
> + u32 offset_legacy:22;
> + u32 subsys_legacy:2;
> + } __packed;
> };
> u8 op;
> };
> @@ -219,10 +228,16 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
> {
> struct cmdq_instruction inst = {
> .op = CMDQ_CODE_WRITE,
> - .value = value,
> - .offset = offset,
> - .subsys = subsys
> + .value = value
> };
> +
> + if (pkt->priv.legacy_isa) {
> + inst.offset_legacy = offset;
> + inst.subsys_legacy = subsys;
> + } else {
> + inst.offset = offset;
> + inst.subsys = subsys;
> + }
> return cmdq_pkt_append_command(pkt, inst);
> }
> EXPORT_SYMBOL(cmdq_pkt_write);
> @@ -459,10 +474,16 @@ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> {
> struct cmdq_instruction inst = {
> .op = CMDQ_CODE_POLL,
> - .value = value,
> - .offset = offset,
> - .subsys = subsys
> + .value = value
> };
> +
> + if (pkt->priv.legacy_isa) {
> + inst.offset_legacy = offset;
> + inst.subsys_legacy = subsys;
> + } else {
> + inst.offset = offset;
> + inst.subsys = subsys;
> + }
> return cmdq_pkt_append_command(pkt, inst);
> }
> EXPORT_SYMBOL(cmdq_pkt_poll);
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 07c1bfbdb8c4..9fcebc4ca864 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -72,6 +72,7 @@ struct cmdq_cb_data {
>
> struct cmdq_mbox_priv {
> u8 shift_pa;
> + bool legacy_isa;
> dma_addr_t mminfra_offset;
> };
>
>
next prev parent reply other threads:[~2026-07-28 15:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 9:42 [PATCH 0/3] MediaTek mt6572 GCE support Roman Vivchar via B4 Relay
2026-07-28 9:42 ` Roman Vivchar
2026-07-28 9:42 ` [PATCH 1/3] dt-bindings: mailbox: mediatek,gce-mailbox: add mt6572 Roman Vivchar via B4 Relay
2026-07-28 9:42 ` Roman Vivchar
2026-07-28 9:42 ` [PATCH 2/3] soc: mediatek: cmdq-helper: add legacy GCE ISA support Roman Vivchar via B4 Relay
2026-07-28 9:42 ` Roman Vivchar
2026-07-28 9:59 ` sashiko-bot
2026-07-28 15:08 ` AngeloGioacchino Del Regno [this message]
2026-07-28 15:47 ` Roman Vivchar
2026-07-28 15:52 ` AngeloGioacchino Del Regno
2026-07-28 16:00 ` Roman Vivchar
2026-07-28 9:42 ` [PATCH 3/3] mailbox: mtk-cmdq: add mt6572 support Roman Vivchar via B4 Relay
2026-07-28 9:42 ` Roman Vivchar
2026-07-28 9:56 ` sashiko-bot
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