From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brandon Wyman Date: Fri, 28 Feb 2020 11:24:01 -0600 Subject: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com> References: <20200225201415.431668-1-msbarth@linux.ibm.com> Message-ID: List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On 2020-02-25 14:14, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- Reviewed-by: Brandon Wyman > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include > +#include > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio at 0 { > reg = <0>; > + type = ; > }; > > gpio at 1 { > reg = <1>; > + type = ; > }; > > gpio at 2 { > reg = <2>; > + type = ; > }; > > gpio at 3 { > reg = <3>; > + type = ; > }; > > gpio at 4 { > reg = <4>; > + type = ; > }; > > gpio at 5 { > reg = <5>; > + type = ; > }; > > gpio at 6 { > reg = <6>; > + type = ; > }; > > gpio at 7 { > reg = <7>; > + type = ; > }; > > gpio at 8 { > reg = <8>; > + type = ; > }; > > gpio at 9 { > reg = <9>; > + type = ; > }; > > gpio at 10 { > reg = <10>; > + type = ; > }; > > gpio at 11 { > reg = <11>; > + type = ; > }; > > gpio at 12 { > reg = <12>; > + type = ; > }; > > gpio at 13 { > reg = <13>; > + type = ; > }; > > gpio at 14 { > reg = <14>; > + type = ; > }; > > gpio at 15 { > reg = <15>; > + type = ; > }; > }; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::c42; helo=mail-yw1-xc42.google.com; envelope-from=bjwyman@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=BiCNBCpD; dkim-atps=neutral Received: from mail-yw1-xc42.google.com (mail-yw1-xc42.google.com [IPv6:2607:f8b0:4864:20::c42]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48TbxN3SbQzDrMK; Sat, 29 Feb 2020 04:24:06 +1100 (AEDT) Received: by mail-yw1-xc42.google.com with SMTP id i190so4043225ywc.2; Fri, 28 Feb 2020 09:24:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:references:from:message-id:date:user-agent:mime-version :in-reply-to:content-transfer-encoding:content-language; bh=8DBagXdO92SGZD18edolNudaDY7BySfxVES4onPKc48=; b=BiCNBCpDhvom4uoBEgi6wWUf78Kj5hpmt5TQuapy9qcR64nz4OnJs4O7vU8LcLUu1Q Nfy/foDa3tGn4/w4Qq2UVG6M4CVuzCmn9cGtWCFzLZD/gC/cBKSKqjOgg1Y3L5Yy0mGv PDHzM2BiUkH/rSgYYhZ/pZYHhX40OjyNXBiHVxpBfnnDjWLEmX58heB6u2EeaeQzIDcy 6/UrxwaLyrcFcHFVPAHwz4hCE5WmYIR+hl7l9Q9Zqhhks6gu/viQxHQ2VyXC/iKyyhnS TRQifnXdpH2I43DBTHtwz6C4YTGxMhpodWZtaFd/rok5ZYFKXb0osBRKqJwU0XgXJ6eg 8KBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding :content-language; bh=8DBagXdO92SGZD18edolNudaDY7BySfxVES4onPKc48=; b=ed9vuv6rbeFnwuazuPs4YqJhKdEgP1r6qsvtFmgei5697iURFeHWEPmnZhHfW1/yaG 3Wc+BsNCDSVZui/UkEfGp1FBP/Qaj74dydekTdqYT3DftyEKleyl+VAvtkV9pZdaGfu0 LgC/ZRClv366ttSf+frwN/HmljjOGDVJjBnDIlOYe2wmE3y4N8mnJDqVEcee+Fr6FuS1 wIxzZQK5I/rH3J5T2tPwXXT4d2dhDEI1YLpPlYpQxu3wo+IVY7G7MmC7Tae7wkzqRkhw t/xz4lz66f2psKGfxYu2mqAGoP0fFpC4uw1FwyRYBA6ACUU+66kpAv8YUh2PGuzaIeZ+ sqXg== X-Gm-Message-State: APjAAAUOS4bNlCKoNEc6RWrnOIOaQKpa/KQXYalN1kUW/ynWjVq2WLpB 4716rtLkr8iZszkrfIZ5a8o= X-Google-Smtp-Source: APXvYqzjFFyA3EgEXXPFZc4AK1Co1/BHuEDPNq3NoVt9mMTOgu4Ojh5FyaxarOeEjgtDprXLfIV49w== X-Received: by 2002:a25:b16:: with SMTP id 22mr4521149ybl.380.1582910643178; Fri, 28 Feb 2020 09:24:03 -0800 (PST) Received: from [192.168.1.111] (96-42-251-64.dhcp.roch.mn.charter.com. [96.42.251.64]) by smtp.gmail.com with ESMTPSA id a202sm4221235ywe.8.2020.02.28.09.24.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Feb 2020 09:24:02 -0800 (PST) Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types To: Matthew Barth , Joel Stanley , Andrew Jeffery , openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Eddie James References: <20200225201415.431668-1-msbarth@linux.ibm.com> From: Brandon Wyman Message-ID: Date: Fri, 28 Feb 2020 11:24:01 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Feb 2020 17:24:09 -0000 On 2020-02-25 14:14, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- Reviewed-by: Brandon Wyman > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include > +#include > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = ; > }; > > gpio@1 { > reg = <1>; > + type = ; > }; > > gpio@2 { > reg = <2>; > + type = ; > }; > > gpio@3 { > reg = <3>; > + type = ; > }; > > gpio@4 { > reg = <4>; > + type = ; > }; > > gpio@5 { > reg = <5>; > + type = ; > }; > > gpio@6 { > reg = <6>; > + type = ; > }; > > gpio@7 { > reg = <7>; > + type = ; > }; > > gpio@8 { > reg = <8>; > + type = ; > }; > > gpio@9 { > reg = <9>; > + type = ; > }; > > gpio@10 { > reg = <10>; > + type = ; > }; > > gpio@11 { > reg = <11>; > + type = ; > }; > > gpio@12 { > reg = <12>; > + type = ; > }; > > gpio@13 { > reg = <13>; > + type = ; > }; > > gpio@14 { > reg = <14>; > + type = ; > }; > > gpio@15 { > reg = <15>; > + type = ; > }; > }; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEA99C3F2CD for ; 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[96.42.251.64]) by smtp.gmail.com with ESMTPSA id a202sm4221235ywe.8.2020.02.28.09.24.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Feb 2020 09:24:02 -0800 (PST) Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types To: Matthew Barth , Joel Stanley , Andrew Jeffery , openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Eddie James References: <20200225201415.431668-1-msbarth@linux.ibm.com> From: Brandon Wyman Message-ID: Date: Fri, 28 Feb 2020 11:24:01 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200228_092404_676367_2FA965F6 X-CRM114-Status: GOOD ( 13.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-02-25 14:14, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- Reviewed-by: Brandon Wyman > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include > +#include > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = ; > }; > > gpio@1 { > reg = <1>; > + type = ; > }; > > gpio@2 { > reg = <2>; > + type = ; > }; > > gpio@3 { > reg = <3>; > + type = ; > }; > > gpio@4 { > reg = <4>; > + type = ; > }; > > gpio@5 { > reg = <5>; > + type = ; > }; > > gpio@6 { > reg = <6>; > + type = ; > }; > > gpio@7 { > reg = <7>; > + type = ; > }; > > gpio@8 { > reg = <8>; > + type = ; > }; > > gpio@9 { > reg = <9>; > + type = ; > }; > > gpio@10 { > reg = <10>; > + type = ; > }; > > gpio@11 { > reg = <11>; > + type = ; > }; > > gpio@12 { > reg = <12>; > + type = ; > }; > > gpio@13 { > reg = <13>; > + type = ; > }; > > gpio@14 { > reg = <14>; > + type = ; > }; > > gpio@15 { > reg = <15>; > + type = ; > }; > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel