From: SRINIVASAN SHANMUGAM <srinivasan.shanmugam@amd.com>
To: "Christian König" <ckoenig.leichtzumerken@gmail.com>,
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdgpu: cleanup amdgpu_vm_flush v2
Date: Fri, 4 Apr 2025 10:45:02 +0530 [thread overview]
Message-ID: <ec5eaf52-2017-4328-b66e-50a394449d62@amd.com> (raw)
In-Reply-To: <20250402140213.13455-2-christian.koenig@amd.com>
On 4/2/2025 7:32 PM, Christian König wrote:
> This reverts commit c2cc3648ba517a6c270500b5447d5a1efdad5936. Turned out
> that this has some negative consequences for some workloads. Instead check
> if the cleaner shader should run directly.
>
> While at it remove amdgpu_vm_need_pipeline_sync(), we also check again
> if the VMID has seen a GPU reset since last use and the gds switch
> setiing can be handled more simply as well.
>
> Also remove some duplicate checks and re-order and document the code.
>
> v2: restructure the while function
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 89 +++++++++-----------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 5 +-
> 3 files changed, 34 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 802743efa3b3..ff2ca984279a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -191,8 +191,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
> need_ctx_switch = ring->current_ctx != fence_ctx;
> if (ring->funcs->emit_pipeline_sync && job &&
> ((tmp = amdgpu_sync_get_fence(&job->explicit_sync)) ||
> - need_ctx_switch || amdgpu_vm_need_pipeline_sync(ring, job))) {
> -
> + (amdgpu_sriov_vf(adev) && need_ctx_switch))) {
> need_pipe_sync = true;
So based on this, Pipeline Sync (ie., wait for GPU to become idle) is
needed only for SRIOV cases, like when SRIOV want to preempt ring
buffers and switch to another ring buffers, might require
synchronization to avoid clashes between virtual devices.
>
> if (tmp)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index b5ddfcbbc9fc..d7a4cb07defc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -596,37 +596,6 @@ void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev)
> }
> }
>
> -/**
> - * amdgpu_vm_need_pipeline_sync - Check if pipe sync is needed for job.
> - *
> - * @ring: ring on which the job will be submitted
> - * @job: job to submit
> - *
> - * Returns:
> - * True if sync is needed.
> - */
> -bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
> - struct amdgpu_job *job)
> -{
> - struct amdgpu_device *adev = ring->adev;
> - unsigned vmhub = ring->vm_hub;
> - struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
> -
> - if (job->vmid == 0)
> - return false;
> -
> - if (job->vm_needs_flush || ring->has_compute_vm_bug)
> - return true;
> -
> - if (ring->funcs->emit_gds_switch && job->gds_switch_needed)
> - return true;
> -
> - if (amdgpu_vmid_had_gpu_reset(adev, &id_mgr->ids[job->vmid]))
> - return true;
> -
> - return false;
> -}
> -
> /**
> * amdgpu_vm_flush - hardware flush the vm
> *
> @@ -647,29 +616,31 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> unsigned vmhub = ring->vm_hub;
> struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
> struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];
> - bool spm_update_needed = job->spm_update_needed;
> - bool gds_switch_needed = ring->funcs->emit_gds_switch &&
> - job->gds_switch_needed;
> - bool vm_flush_needed = job->vm_needs_flush;
> - bool cleaner_shader_needed = false;
> - bool pasid_mapping_needed = false;
> - struct dma_fence *fence = NULL;
> + bool gds_switch_needed, vm_flush_needed, spm_update_needed,
> + cleaner_shader_needed, pasid_mapping_needed;
> + struct dma_fence *fence;
> unsigned int patch;
> int r;
>
> + /* First of all figure out what needs to be done */
> if (amdgpu_vmid_had_gpu_reset(adev, id)) {
> + need_pipe_sync = true;
> gds_switch_needed = true;
> vm_flush_needed = true;
> pasid_mapping_needed = true;
> spm_update_needed = true;
> + } else {
> + gds_switch_needed = job->gds_switch_needed;
*[1]:* Should we need to check along with "ring->funcs->emit_gds_switch"
ie., "ring->funcs->emit_gds_switch && job->gds_switch_needed;"
> + vm_flush_needed = job->vm_needs_flush;
> + mutex_lock(&id_mgr->lock);
> + if (id->pasid != job->pasid || !id->pasid_mapping ||
> + !dma_fence_is_signaled(id->pasid_mapping))
> + pasid_mapping_needed = true;
> + mutex_unlock(&id_mgr->lock);
> + spm_update_needed = job->spm_update_needed;
> + need_pipe_sync |= vm_flush_needed && ring->has_compute_vm_bug;
*[2]:* Just to double check, based on the old code, Pipeline Sync was
emitted, ie., whenever job needed vm_flush and that was OR'ed with
"Compute rings had the issues on gfx8 , where pipeline sync was added
before we switch the compute jobs", but despite of this compute ring
issues, we might still need vm_flush -> for a job switching that is
using same vmid as previous one, am I correct please? ie., should we
need to retain something like this, same as old code ie.,
"vm_flush_needed || ring->has_compute_vm_bug;" ?
> }
>
> - mutex_lock(&id_mgr->lock);
> - if (id->pasid != job->pasid || !id->pasid_mapping ||
> - !dma_fence_is_signaled(id->pasid_mapping))
> - pasid_mapping_needed = true;
> - mutex_unlock(&id_mgr->lock);
> -
> gds_switch_needed &= !!ring->funcs->emit_gds_switch;
> vm_flush_needed &= !!ring->funcs->emit_vm_flush &&
> job->vm_pd_addr != AMDGPU_BO_INVALID_OFFSET;
> @@ -684,12 +655,13 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> !cleaner_shader_needed)
> return 0;
>
> + /* Then aktually prepare the submission frame */
*[3]:* Could you pls correct the typo?
> amdgpu_ring_ib_begin(ring);
> if (ring->funcs->init_cond_exec)
> patch = amdgpu_ring_init_cond_exec(ring,
> ring->cond_exe_gpu_addr);
>
> - if (need_pipe_sync)
> + if (need_pipe_sync || cleaner_shader_needed || gds_switch_needed)
So with this checks, whenever cleaner shader or GDS (Global Data Store)
Switches need to be emitted, we expect GPU to be in idle state , by
emitting Pipeline Sync.
> amdgpu_ring_emit_pipeline_sync(ring);
>
> if (cleaner_shader_needed)
> @@ -706,20 +678,31 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid)
> adev->gfx.rlc.funcs->update_spm_vmid(adev, ring, job->vmid);
>
> - if (ring->funcs->emit_gds_switch &&
> - gds_switch_needed) {
> + if (gds_switch_needed)
> amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
> job->gds_size, job->gws_base,
> job->gws_size, job->oa_base,
> job->oa_size);
> - }
>
> if (vm_flush_needed || pasid_mapping_needed || cleaner_shader_needed) {
> r = amdgpu_fence_emit(ring, &fence, NULL, 0);
> if (r)
> return r;
> + } else {
> + fence = NULL;
> + }
> +
> + amdgpu_ring_patch_cond_exec(ring, patch);
> +
> + /* the double SWITCH_BUFFER here *cannot* be skipped by COND_EXEC */
> + if (ring->funcs->emit_switch_buffer) {
> + amdgpu_ring_emit_switch_buffer(ring);
> + amdgpu_ring_emit_switch_buffer(ring);
> }
>
> + amdgpu_ring_ib_end(ring);
> +
By moving this here, we ensure that previous jobs that those are
dependent on current job are managed & complete, fully synchronized
before any patching or switching buffers logic's are applied. In gang
submissions, this is crucial. Ensuring synchronization before context
changes prevents one job from interfering with another, thus enforcing
isolation effectively.
> + /* And finally remember what the ring has executed */
> if (vm_flush_needed) {
> mutex_lock(&id_mgr->lock);
> dma_fence_put(id->last_flush);
> @@ -749,16 +732,6 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> mutex_unlock(&adev->enforce_isolation_mutex);
> }
> dma_fence_put(fence);
> -
> - amdgpu_ring_patch_cond_exec(ring, patch);
> -
> - /* the double SWITCH_BUFFER here *cannot* be skipped by COND_EXEC */
> - if (ring->funcs->emit_switch_buffer) {
> - amdgpu_ring_emit_switch_buffer(ring);
> - amdgpu_ring_emit_switch_buffer(ring);
> - }
> -
> - amdgpu_ring_ib_end(ring);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index daa2f9b33620..e9ecdb96bafa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -493,7 +493,8 @@ int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> struct ww_acquire_ctx *ticket,
> int (*callback)(void *p, struct amdgpu_bo *bo),
> void *param);
> -int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_pipe_sync);
> +int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> + bool need_pipe_sync);
> int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
> struct amdgpu_vm *vm, bool immediate);
> int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> @@ -550,8 +551,6 @@ void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
> uint32_t fragment_size_default, unsigned max_level,
> unsigned max_bits);
> int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
> -bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
> - struct amdgpu_job *job);
> void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev);
>
> struct amdgpu_task_info *
Requesting for feedback's that is marked as *[1]* , *[2]* & *[3]*
addressed , with this, the patch is:
Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
next prev parent reply other threads:[~2025-04-04 5:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-02 14:02 [PATCH 1/2] drm/amdgpu: use a dummy owner for sysfs triggered cleaner shaders v2 Christian König
2025-04-02 14:02 ` [PATCH 2/2] drm/amdgpu: cleanup amdgpu_vm_flush v2 Christian König
2025-04-04 5:15 ` SRINIVASAN SHANMUGAM [this message]
2025-04-03 3:15 ` [PATCH 1/2] drm/amdgpu: use a dummy owner for sysfs triggered cleaner shaders v2 SRINIVASAN SHANMUGAM
2025-04-03 9:10 ` Christian König
2025-04-03 13:56 ` SRINIVASAN SHANMUGAM
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