From: Florian Fainelli <f.fainelli@gmail.com>
To: "Clément Léger" <clement.leger@bootlin.com>,
"Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"David S . Miller" <davem@davemloft.net>,
"Jakub Kicinski" <kuba@kernel.org>,
"Andrew F . Davis" <afd@ti.com>, "Dan Murphy" <dmurphy@ti.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH] net: phy: DP83822: clear MISR2 register to disable interrupts
Date: Wed, 9 Mar 2022 09:40:56 -0800 [thread overview]
Message-ID: <eda7f852-af2b-dac3-bb71-0be7f3230170@gmail.com> (raw)
In-Reply-To: <20220309142228.761153-1-clement.leger@bootlin.com>
On 3/9/22 6:22 AM, Clément Léger wrote:
> MISR1 was cleared twice but the original author intention was probably
> to clear MISR1 & MISR2 to completely disable interrupts. Fix it to
> clear MISR2.
>
> Fixes: 87461f7a58ab ("net: phy: DP83822 initial driver submission")
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
next prev parent reply other threads:[~2022-03-09 17:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-09 14:22 [PATCH] net: phy: DP83822: clear MISR2 register to disable interrupts Clément Léger
2022-03-09 16:48 ` Andrew Lunn
2022-03-09 17:40 ` Florian Fainelli [this message]
2022-03-10 20:40 ` patchwork-bot+netdevbpf
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