From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, chris@chris-wilson.co.uk
Subject: Re: [PATCH] drm/i915: Reduce frequency of unspecific HSW reg debugging
Date: 22 Mar 2015 11:38:41 -0700 [thread overview]
Message-ID: <edcf24$e14atk@FMSMGA003.fm.intel.com> (raw)
In-Reply-To: <1427038864-26627-1-git-send-email-chris@chris-wilson.co.uk>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6023
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -4 272/272 268/272
ILK 303/303 303/303
SNB 304/304 304/304
IVB 344/344 344/344
BYT 287/287 287/287
HSW 362/362 362/362
BDW 308/308 308/308
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt_gem_userptr_blits_minor-unsync-interruptible DMESG_WARN(1)PASS(1) DMESG_WARN(1)PASS(1)
PNV igt_gen3_render_mixed_blits FAIL(1)PASS(2) FAIL(2)
*PNV igt_gen3_render_tiledy_blits PASS(2) FAIL(2)
*PNV igt_gem_tiled_pread_pwrite PASS(1) FAIL(2)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-03-22 18:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-22 15:41 [PATCH] drm/i915: Reduce frequency of unspecific HSW reg debugging Chris Wilson
2015-03-22 18:38 ` shuang.he [this message]
2015-03-23 9:35 ` Daniel Vetter
2015-03-23 9:43 ` Chris Wilson
2015-03-23 9:47 ` Chris Wilson
-- strict thread matches above, loose matches on Subject: below --
2015-08-26 7:52 Chris Wilson
2015-08-26 15:27 ` Mika Kuoppala
2015-08-26 15:49 ` Chris Wilson
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