From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: Kathleen Capella <kathleen.capella@arm.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "nd@arm.com" <nd@arm.com>,
"dharmik.thakkar@arm.com" <dharmik.thakkar@arm.com>,
"honnappa.nagarahalli@arm.com" <honnappa.nagarahalli@arm.com>
Subject: RE: [PATCH 0/2] Add logic to IAVF to count continuous DD bits for Arm
Date: Wed, 9 Feb 2022 02:00:37 +0000 [thread overview]
Message-ID: <ee3cd3ac294c4156b72046e8b8503fea@intel.com> (raw)
In-Reply-To: <20220205002630.31841-1-kathleen.capella@arm.com>
> -----Original Message-----
> From: Kathleen Capella <kathleen.capella@arm.com>
> Sent: Saturday, February 5, 2022 8:26 AM
> Cc: dev@dpdk.org; nd@arm.com; dharmik.thakkar@arm.com;
> honnappa.nagarahalli@arm.com; Kathleen Capella
> <kathleen.capella@arm.com>
> Subject: [PATCH 0/2] Add logic to IAVF to count continuous DD bits for Arm
>
> This patchset introduces a fix for Arm platforms to the IAVF driver that was
> added to the i40e driver in a previous patchset [1].
>
> The driver determines which descriptors in the HW ring reference packets
> that are ready to be received by counting those descriptors whose DD bit is
> set to 1. On Arm, the reading of descriptors can be reordered. The CPU may
> be reading descriptors as the NIC is updating them. Tt is possbile that the DD
> bit for a descriptor earlier in the queue is read as not set while the DD bit for
> a descriptor later in the queue is read as set. This patchset ensures only
> contiguous DD bits set to 1 are counted.
>
> The first patch in this series adds this logic to the bulk Rx path.
> The second patch adds this same logic to the function which reads flexible Rx
> descriptors.
>
> No performance drop was observed when running l3fwd on N1SDP with a
> single core.
>
> [1]
> https://patches.dpdk.org/project/dpdk/patch/20210706065404.25137-2-
> joyce.kong@arm.com/
>
> Kathleen Capella (2):
> net/iavf: count continuous DD bits for Arm
> net/iavf: count continuous DD bits for Arm in flex Rx
>
> drivers/net/iavf/iavf_rxtx.c | 52 ++++++++++++++++++++++++++++++------
> 1 file changed, 44 insertions(+), 8 deletions(-)
>
> --
> 2.17.1
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
prev parent reply other threads:[~2022-02-09 2:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-05 0:26 [PATCH 0/2] Add logic to IAVF to count continuous DD bits for Arm Kathleen Capella
2022-02-05 0:26 ` [PATCH 1/2] net/iavf: " Kathleen Capella
2022-02-05 0:26 ` [PATCH 2/2] net/iavf: count continuous DD bits for Arm in flex Rx Kathleen Capella
2022-02-07 21:51 ` [PATCH 0/2] Add logic to IAVF to count continuous DD bits for Arm Kathleen Capella
2022-02-09 2:00 ` Zhang, Qi Z [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ee3cd3ac294c4156b72046e8b8503fea@intel.com \
--to=qi.z.zhang@intel.com \
--cc=dev@dpdk.org \
--cc=dharmik.thakkar@arm.com \
--cc=honnappa.nagarahalli@arm.com \
--cc=kathleen.capella@arm.com \
--cc=nd@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.