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From: Michael Riesch <michael.riesch@collabora.com>
To: linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 1/3] phy: rockchip: phy-rockchip-inno-csidphy: fix rk1808 hsfreq table
Date: Fri, 10 Jul 2026 10:35:58 +0200	[thread overview]
Message-ID: <ef9fa1fa-0267-45a9-8e4e-00eccffdf470@collabora.com> (raw)
In-Reply-To: <20260630-feature-mipi-csi-dphy-4k60-v3-1-176792ab71fa@wolfvision.net>

Hi Gerald,

Thanks for your work.

On 6/30/26 09:48, Gerald Loacker wrote:
> The rk1808 hsfreq table capped at 2499 Mbps, preventing a data rate of
> exactly 2500 Mbps. Extend the final entry to 2500 Mbps to support this
> rate.
> 
> This is essential for RK3588 reusing this array and fully supporting
> rates up to 2500 Mbps.

Makes sense to me.

> 
> Fixes: bd1f775d6027 ("phy/rockchip: add Innosilicon-based CSI dphy")
> Signed-off-by: Gerald Loacker <gerald.loacker@wolfvision.net>

Reviewed-by: Michael Riesch <michael.riesch@collabora.com>

Best regards,
Michael

> ---
>  drivers/phy/rockchip/phy-rockchip-inno-csidphy.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-csidphy.c b/drivers/phy/rockchip/phy-rockchip-inno-csidphy.c
> index c79fb53d8ee5c..5281f8dea0ad3 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-csidphy.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-csidphy.c
> @@ -170,7 +170,7 @@ static const struct hsfreq_range rk1808_mipidphy_hsfreq_ranges[] = {
>  	{ 299, 0x06}, { 399, 0x08}, { 499, 0x0b}, { 599, 0x0e},
>  	{ 699, 0x10}, { 799, 0x12}, { 999, 0x16}, {1199, 0x1e},
>  	{1399, 0x23}, {1599, 0x2d}, {1799, 0x32}, {1999, 0x37},
> -	{2199, 0x3c}, {2399, 0x41}, {2499, 0x46}
> +	{2199, 0x3c}, {2399, 0x41}, {2500, 0x46}
>  };
>  
>  static const struct hsfreq_range rk3326_mipidphy_hsfreq_ranges[] = {
> 


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  parent reply	other threads:[~2026-07-10  8:36 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-30  7:48 [PATCH v3 0/3] phy: rockchip: inno-csidphy: fix 2500 Mbps support and add clock lane phase tuning Gerald Loacker
2026-06-30  7:48 ` Gerald Loacker
2026-06-30  7:48 ` Gerald Loacker
2026-06-30  7:48 ` [PATCH v3 1/3] phy: rockchip: phy-rockchip-inno-csidphy: fix rk1808 hsfreq table Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-06-30  8:00   ` sashiko-bot
2026-06-30  8:00     ` sashiko-bot
2026-07-10  8:35   ` Michael Riesch [this message]
2026-07-10  9:28   ` Michael Riesch
2026-07-10  9:28     ` Michael Riesch
2026-07-10  9:28     ` Michael Riesch
2026-06-30  7:48 ` [PATCH v3 2/3] dt-bindings: phy: rockchip-inno-csi-dphy: add rockchip,clk-lane-phase property Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-06-30 19:25   ` Rob Herring (Arm)
2026-06-30 19:25     ` Rob Herring (Arm)
2026-06-30 19:25     ` Rob Herring (Arm)
2026-07-10  9:30   ` Michael Riesch
2026-07-10  9:30     ` Michael Riesch
2026-07-10  9:30     ` Michael Riesch
2026-06-30  7:48 ` [PATCH v3 3/3] phy: rockchip: phy-rockchip-inno-csidphy: add clock lane phase tuning Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-06-30  7:48   ` Gerald Loacker
2026-07-10  9:31   ` Michael Riesch
2026-07-10  9:31     ` Michael Riesch
2026-07-10  9:31     ` Michael Riesch
2026-07-12 14:42     ` Gerald Loacker

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