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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9a3b83sm11271536f8f.33.2025.03.24.07.08.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Mar 2025 07:08:47 -0700 (PDT) Message-ID: Date: Mon, 24 Mar 2025 15:08:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device To: Jason Gunthorpe Cc: Nicolin Chen , Shameer Kolothum , qemu-arm@nongnu.org, qemu-devel@nongnu.org, peter.maydell@linaro.org, ddutile@redhat.com, berrange@redhat.com, nathanc@nvidia.com, mochs@nvidia.com, smostafa@google.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, zhangfei.gao@linaro.org References: <20250311141045.66620-1-shameerali.kolothum.thodi@huawei.com> <20250311141045.66620-4-shameerali.kolothum.thodi@huawei.com> <71b73212-3d8f-4c9d-93a4-bf07c0f169e3@redhat.com> <20250317192453.GR9311@nvidia.com> <6cb391a4-d150-4692-b62e-a509448a1034@redhat.com> <20250319003135.GH9311@nvidia.com> From: Eric Auger In-Reply-To: <20250319003135.GH9311@nvidia.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: g_iVzfqPYrMd61Wbkwtb0aAHUledKegPNCHiSOf8MKE_1742825329 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: n8NxYCI4Y+dQ Hi Jason, On 3/19/25 1:31 AM, Jason Gunthorpe wrote: > On Tue, Mar 18, 2025 at 07:31:36PM +0100, Eric Auger wrote: >> Nevertheless I don't think anything prevents the acceleration granted >> device from also working with virtio/vhost devices for instance unless >> you unplug the existing infra. > If the accel mode is using something like vcmdq then it is not > possible to work since the invalidations won't even be trapped. I acknowledged I was more focused on the case without vcmdq which was addressed in the past and now I better see the problem. > > Even in the case where we trap the invalidations it sure is > complicated.. invalidation is done by ASID which is not obviously > related to any specific device. An ASID could be hidden inside a CD > table that is being HW accessed and also inside a CD table that is SW > accessed. The VMM has no way to know what is going on so you'd end up > forced to replicate all the ASID invalidations. :\ Nevertheless I think we shall also support the case without vcmdq (currently supported in this series). And this one looks more compatible with emulated devices althout less optimized. > > It just doesn't seem worthwhile to try to make it all work. > > I'd suggest arranging to share some of the SMMUv3 emulation code, > maybe with a library/headerfile or something, but I think it does make > sense they would be different implementations given how completely > different they should be. I agree with can do our utmost to separate implementations. I more concerned about having libvirt guessing what kind of devices it shall use. on x86 libvirt needs to use -device intel-iommu,caching-mode=on if one wants to protect a VFIO device. So this looks like similar to adding accel=on on ARM. Eric > > Jason >