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From: Mark Hatle <mark.hatle@kernel.crashing.org>
To: Trevor Gamblin <tgamblin@baylibre.com>,
	openembedded-core@lists.openembedded.org
Cc: raj.khem@gmail.com
Subject: Re: [OE-core][PATCH RFC v2 12/19] meta/lib/oe/tune.py: add riscv_pkgarch()
Date: Thu, 8 Oct 2026 10:26:27 -0500	[thread overview]
Message-ID: <effbb186-66cb-4a09-9337-92be41e8f9f3@kernel.crashing.org> (raw)
In-Reply-To: <20260930-riscv-tuning-rework-v2-12-9e29f3531d0e@baylibre.com>



On 9/30/26 11:38 AM, Trevor Gamblin wrote:
> Create a new function to help match RISC-V ISA extension combinations
> against recognized profile strings (e.g. 'rva22u64'), so that we can use
> simpler patterns for naming things like sstate/build paths.
> 
> Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
> ---
>   meta/lib/oe/tune.py | 29 +++++++++++++++++++++++++++++
>   1 file changed, 29 insertions(+)
> 
> diff --git a/meta/lib/oe/tune.py b/meta/lib/oe/tune.py
> index 7296f39e66..0d8e4417e7 100644
> --- a/meta/lib/oe/tune.py
> +++ b/meta/lib/oe/tune.py
> @@ -90,3 +90,32 @@ def riscv_isa_to_tune(isa):
>       # Eliminate duplicates, but preserve the order
>       feature = list(dict.fromkeys(feature))
>       return ' '.join(feature)
> +
> +# riscv_pkgarch(features, exact_pkgarch)
> +#
> +# Prefer a RISCV_PROFILES name (plus any extensions enabled on top of it) as the
> +# package arch fragment, since otherwise the full ISA extension list will exceed
> +# what the sstate class can handle. When several profiles match, the one with
> +# the most extensions is preferred, as it is the more specific/clearer match.
> +# If there's no clear profile matching the extension list, then fall back to
> +# exact_pkgarch.
> +def riscv_pkgarch(features, exact_pkgarch):
> +    if not features:
> +        return exact_pkgarch
> +
> +    current = set(features.split())
> +
> +    best_match = None
> +    best_features = None
> +    for name in RISCV_PROFILES:

Where is 'RISCV_PROFILES' defined?

As long as someone is willing to keep this up to date with all of the new 
profiles, I don't have a concern with it.

On my AMD platforms, we have dynamic (user defined) ISA for our parts, the users 
don't really use 'profiles', but select individual isa components.  I would LIKE 
(but only because it's easier for me) a way to see the ISA and not have it 
converted back to a profile.  However, if profiles are the risc-v ISA standard, 
I'm fine without a way to disable the translation.

--Mark

> +        profile_features = set(riscv_isa_to_tune(name).split())
> +        if profile_features.issubset(current):
> +            if best_features is None or len(profile_features) > len(best_features):
> +                best_match = name
> +                best_features = profile_features
> +
> +    if best_match is None:
> +        return exact_pkgarch
> +
> +    extra = sorted(current - best_features)
> +    return '_'.join([best_match] + extra)
> 


  reply	other threads:[~2026-10-08 15:26 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 16:38 [OE-core][PATCH RFC v2 00/19] riscv: add new ISA extensions and profile support Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 01/19] tune-riscv: be explicit about riscv32gc, riscv64gc defaults Trevor Gamblin
2026-10-08 15:19   ` Mark Hatle
2026-10-15 18:46     ` Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 02/19] tune-riscv.inc: add 'riscv64gcv' tune Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 03/19] arch-riscv.inc: add missing RVA20 extensions Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 04/19] meta/lib/oe/tune.py: support profile strings, add rva20u64 Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 05/19] tune-riscv.inc: add rva20u64 to AVAILTUNES Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 06/19] arch-riscv.inc: add rva22u64 extensions Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 07/19] meta/lib/oe/tune.py: add rva22u64 profile Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 08/19] tune-riscv.inc: add rva22u64 to AVAILTUNES Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 09/19] arch-riscv.inc: add rva23u64 extensions Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 10/19] meta/lib/oe/tune.py: add rva23u64 profile Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 11/19] tune-riscv.inc: add rva23u64 to AVAILTUNES Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 12/19] meta/lib/oe/tune.py: add riscv_pkgarch() Trevor Gamblin
2026-10-08 15:26   ` Mark Hatle [this message]
2026-10-15 19:06     ` Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 13/19] arch-riscv.inc: rename TUNE_RISCV_PKGARCH -> TUNE_RISCV_PKGARCH_EXACT in assignments Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 14/19] tune.py: add implied tuning logic Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 15/19] tune.py: add vector extensions to RISCV_IMPLIED Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 16/19] tune-riscv.inc: add RISCV_PKGARCH vars, set PACKAGE_EXTRA_ARCHS Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 17/19] tune-riscv.inc: clarify zifencei comment Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 18/19] selftest: oelib: add tune.py Trevor Gamblin
2026-09-30 16:38 ` [OE-core][PATCH RFC v2 19/19] selftest: cases: add riscvtune.py Trevor Gamblin
2026-10-01  9:13 ` [OE-core][PATCH RFC v2 00/19] riscv: add new ISA extensions and profile support Paul Barker
2026-10-08  7:15   ` Trevor Gamblin
2026-10-08 10:56   ` Khem Raj
2026-10-08 15:42     ` Mark Hatle
2026-10-15 20:00       ` Trevor Gamblin

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