From: Tim Chen <tim.c.chen@linux.intel.com>
To: Jiri Kosina <jikos@kernel.org>, Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Andrea Arcangeli <aarcange@redhat.com>,
"Woodhouse, David" <dwmw@amazon.co.uk>,
Andi Kleen <ak@linux.intel.com>,
"Schaufler, Casey" <casey.schaufler@intel.com>,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH v5 2/2] x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation
Date: Tue, 11 Sep 2018 10:32:34 -0700 [thread overview]
Message-ID: <f0fcbcd9-4619-391e-3c1b-34d06b00de50@linux.intel.com> (raw)
In-Reply-To: <nycvar.YFH.7.76.1809101343370.15880@cbobk.fhfr.pm>
On 09/10/2018 04:46 AM, Jiri Kosina wrote:
> On Mon, 10 Sep 2018, Jiri Kosina wrote:
>
>>> That looks much more palatable. One missing piece is the sysfs
>>> mitigation file for spectre v2. That should reflect STIPB state as well.
>>
>> FWIW, we're missing a bit more in that area, namely RSB stuffing on
>> context switch, IBRS (even through only around fw) and IBPB; those are
>> only signalled in dmesg during bootup.
>
> Nah, IBPB is actuall there, sorry. So I'll add reporting of STIBP + fixup
> the missing reporting of RSB_CTXSW for v6.
>
I anticipate that STIBP could affect workloads with a lot of indirect
branches (see previous discussion with Andrea). We should have a
knob for people to opt in or opt out of STIBP.
Thanks.
Tim
next prev parent reply other threads:[~2018-09-11 17:32 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-10 9:22 [PATCH v5 0/2] Harden spectrev2 userspace-userspace protection Jiri Kosina
2018-09-10 9:23 ` [PATCH v5 1/2] x86/speculation: apply IBPB more strictly to avoid cross-process data leak Jiri Kosina
2018-09-10 18:26 ` Schaufler, Casey
2018-09-10 19:14 ` Jiri Kosina
2018-09-10 19:26 ` Schaufler, Casey
2018-09-10 19:36 ` Jiri Kosina
2018-09-10 20:27 ` Schaufler, Casey
2018-09-10 20:42 ` Jiri Kosina
2018-09-10 21:29 ` Schaufler, Casey
2018-09-10 21:36 ` Jiri Kosina
2018-09-11 21:15 ` Thomas Gleixner
2018-09-11 22:25 ` Schaufler, Casey
2018-09-12 12:01 ` Thomas Gleixner
2018-10-21 19:38 ` Pavel Machek
2018-10-21 23:32 ` Jiri Kosina
2018-09-10 9:24 ` [PATCH v5 2/2] x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation Jiri Kosina
2018-09-10 10:04 ` Thomas Gleixner
2018-09-10 11:01 ` Jiri Kosina
2018-09-10 11:46 ` Jiri Kosina
2018-09-11 17:32 ` Tim Chen [this message]
2018-09-11 21:16 ` Thomas Gleixner
2018-09-11 21:46 ` Thomas Gleixner
2018-09-12 17:16 ` Tom Lendacky
2018-09-12 21:26 ` Tim Chen
2018-09-12 21:45 ` Jiri Kosina
2018-09-12 22:56 ` Tim Chen
2018-09-13 14:53 ` Tom Lendacky
2018-09-12 9:05 ` [PATCH v6 0/3] Harden spectrev2 userspace-userspace protection Jiri Kosina
2018-09-12 9:06 ` [PATCH v6 1/3] x86/speculation: apply IBPB more strictly to avoid cross-process data leak Jiri Kosina
2018-09-13 0:04 ` Schaufler, Casey
2018-09-14 11:00 ` Jiri Kosina
2018-09-14 11:05 ` Thomas Gleixner
2018-09-12 9:07 ` [PATCH v6 2/3] x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation Jiri Kosina
2018-09-12 19:14 ` Thomas Gleixner
2018-09-12 19:16 ` Jiri Kosina
2018-09-12 9:08 ` [PATCH v6 3/3] x86/speculation: Propagate information about RSB filling mitigation to sysfs Jiri Kosina
2018-09-17 16:09 ` [PATCH v6 0/3] Harden spectrev2 userspace-userspace protection Schaufler, Casey
2018-09-19 15:48 ` Peter Zijlstra
2018-09-22 7:38 ` Jiri Kosina
2018-09-22 9:53 ` Thomas Gleixner
2018-09-22 10:18 ` Peter Zijlstra
2018-09-22 10:20 ` Thomas Gleixner
2018-09-22 13:30 ` Thomas Gleixner
2018-09-22 14:31 ` Peter Zijlstra
2018-09-24 8:43 ` Jiri Kosina
2018-09-24 12:38 ` Thomas Gleixner
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