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19 Dec 2023 09:08:18 -0800 Message-ID: Date: Tue, 19 Dec 2023 18:08:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 01/16] Documentation: driver: add SoundWire BRA description Content-Language: en-US To: Mark Brown Cc: linux-sound@vger.kernel.org, alsa-devel@alsa-project.org, tiwai@suse.de, vinod.koul@intel.com, Bard liao , Ranjani Sridharan , Peter Ujfalusi , Kai Vehmanen , srinivas.kandagatla@linaro.org, Krzysztof Kozlowski , vijendar.mukunda@amd.com, Charles Keepax , Richard Fitzgerald , Shuming Fan , Jack Yu , Oder Chiou References: <20231207222944.663893-1-pierre-louis.bossart@linux.intel.com> <20231207222944.663893-2-pierre-louis.bossart@linux.intel.com> <38d0c1c9-d60c-4ddd-b2ee-091d1717a377@sirena.org.uk> <5b8e74ad-460f-4e68-a17b-3131d810f29b@linux.intel.com> <700e564d-7e87-463a-a764-c4713ddf11cd@linux.intel.com> From: Pierre-Louis Bossart In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Message-ID-Hash: UCSH6ZU5OG2FN43YLF4Q3XQ4QT7BZQAS X-Message-ID-Hash: UCSH6ZU5OG2FN43YLF4Q3XQ4QT7BZQAS X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On 12/19/23 17:53, Mark Brown wrote: > On Tue, Dec 19, 2023 at 05:50:30PM +0100, Pierre-Louis Bossart wrote: > >>> grep for regmap_.*async - cs_dsp.c is the upstream example in a driver, >>> or there's the rbtree cache sync code which uses a back door to go into >>> an async mode. Basically just variants of all the normal regmap I/O >>> calls with a _complete() call you can use to wait for everything to >>> happen. The implementation is a bit heavyweight since it was written to >>> work with fairly slow buses. > >> I spent a fair amount of time this afternoon trying to understand the >> regmap_async parts, and I am not following where in the code there is an >> ordering requirement/enforcement between async and sync usages. > > The only actual async implementation is SPI which processes things in > order of submission, the sync API wraps the async API. > >> Also is this just me spacing out or there is no regmap_raw_read_async()? > > Right, there was never any need. ok. I am starting to think that we could have a new type of regmap, say "regmap-sdw-bra", where the use of write_raw_async() would rely on the send/wait bus primitives, and write_raw() would fallback to the regular read/write commands. We'd need a mutual exclusion to prevent parallel async/sync access to the same regmap. In other words, "memory" areas that are used for firmware downloads would be moved to a different regmap with async capabilities and no caching support.