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Tue, 15 Sep 2026 01:49:52 +0000 Message-ID: Date: Mon, 14 Sep 2026 21:49:49 -0400 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/18] drm/amdgpu: move userq fence wait out of signalling section To: Prike Liang , amd-gfx@lists.freedesktop.org Cc: Alexander.Deucher@amd.com, Christian.Koenig@amd.com, Vitaly.Prosyak@amd.com References: <20260902125001.621629-1-Prike.Liang@amd.com> <20260902125001.621629-4-Prike.Liang@amd.com> Content-Language: en-US From: vitaly prosyak In-Reply-To: <20260902125001.621629-4-Prike.Liang@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: YT4P288CA0061.CANP288.PROD.OUTLOOK.COM (2603:10b6:b01:d2::15) To IA1PR12MB8190.namprd12.prod.outlook.com (2603:10b6:208:3f2::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR12MB8190:EE_|MN0PR12MB5740:EE_ X-MS-Office365-Filtering-Correlation-Id: ddc63a79-ba9b-42c0-bdee-08df12cba230 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Waiting on > another DMA fence while responsible for signalling one violates the > cross-driver fence contract and is reported by lockdep as a > dma_fence_map dependency. > > Move the wait before dma_fence_begin_signalling(). Keep userq_mutex held > so queue lifetime remains stable while inspecting last_fence. > > Fixes: fc61df151617 ("drm/amdgpu: annotate eviction fence signaling path") > Signed-off-by: Prike Liang > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 4 +--- > drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 1 + > 3 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c > index 4c5e38dea4c2..a0802012de49 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c > @@ -68,6 +68,9 @@ amdgpu_eviction_fence_suspend_worker(struct work_struct *work) > > mutex_lock(&uq_mgr->userq_mutex); > > + /* Fence waits are not allowed in a fence signalling critical section. */ > + amdgpu_userq_wait_for_signal(uq_mgr); > + > /* > * This is intentionally after taking the userq_mutex since we do > * allocate memory while holding this lock, but only after ensuring that > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c > index ed329041a648..a7b68fd2360e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c > @@ -1272,7 +1272,7 @@ amdgpu_userq_evict_all(struct amdgpu_userq_mgr *uq_mgr) > return ret; > } > > -static void > +void > amdgpu_userq_wait_for_signal(struct amdgpu_userq_mgr *uq_mgr) > { > struct amdgpu_usermode_queue *queue; > @@ -1291,8 +1291,6 @@ amdgpu_userq_wait_for_signal(struct amdgpu_userq_mgr *uq_mgr) > void > amdgpu_userq_evict(struct amdgpu_userq_mgr *uq_mgr) > { > - /* Wait for any pending userqueue fence work to finish */ > - amdgpu_userq_wait_for_signal(uq_mgr); > amdgpu_userq_evict_all(uq_mgr); > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h > index 6412a7f7b6ef..488dc21d7c81 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h > @@ -162,6 +162,7 @@ void amdgpu_userq_mgr_cancel_reset_work(struct amdgpu_device *adev); > void amdgpu_userq_mgr_cancel_resume(struct amdgpu_userq_mgr *userq_mgr); > void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr); > > +void amdgpu_userq_wait_for_signal(struct amdgpu_userq_mgr *uq_mgr); > void amdgpu_userq_evict(struct amdgpu_userq_mgr *uq_mgr); > > void amdgpu_userq_ensure_ev_fence(struct amdgpu_userq_mgr *userq_mgr,