RE: [PATCH v3 07/12] ARM: dts: bcm63148: Add BCMBCA peripherals

[William Zhang <william.zhang@broadcom.com>]

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> -----Original Message-----
> From: Linus Walleij <linus.walleij@linaro.org>
> Sent: Monday, May 12, 2025 5:06 AM
> To: Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>;
> Conor Dooley <conor+dt@kernel.org>; William Zhang
> <william.zhang@broadcom.com>; Anand Gore <anand.gore@broadcom.com>;
> Kursad Oney <kursad.oney@broadcom.com>; Florian Fainelli
> <florian.fainelli@broadcom.com>; Rafał Miłecki <rafal@milecki.pl>;
> Broadcom
> internal kernel review list <bcm-kernel-feedback-list@broadcom.com>;
> Olivia
> Mackall <olivia@selenic.com>; Ray Jui <rjui@broadcom.com>; Scott Branden
> <sbranden@broadcom.com>; Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-
> crypto@vger.kernel.org; Linus Walleij <linus.walleij@linaro.org>
> Subject: [PATCH v3 07/12] ARM: dts: bcm63148: Add BCMBCA peripherals
>
> All the BCMBCA SoCs share a set of peripherals at 0xff800000,
> albeit at slightly varying memory locations on the bus and
> with varying IRQ assignments.
>
> Add the GPIO, RNG and LED and DMA blocks for the
> BCM63148 based on the vendor files 63148_map_part.h and
> 63148_intr.h from the "bcmopen-consumer" code drop.
>
> This SoC has up to 160 possible GPIOs due to having 5
> registers with 32 GPIOs in each available.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi | 64
> ++++++++++++++++++++++++++++++++
>  1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> index
> 53703827ee3fe58ead1dbe70536d7293ad842d0c..e071cddb28fc2888b8f408b4b
> c275290dd135642 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> @@ -99,6 +99,62 @@ bus@ff800000 {
>  		#size-cells = <1>;
>  		ranges = <0 0xfffe8000 0x8000>;
>
> +		/* GPIOs 0 .. 31 */
> +		gpio0: gpio@100 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x100 0x04>, <0x114 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 32 .. 63 */
> +		gpio1: gpio@104 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x104 0x04>, <0x118 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 64 .. 95 */
> +		gpio2: gpio@108 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x108 0x04>, <0x11c 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 96 .. 127 */
> +		gpio3: gpio@10c {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x10c 0x04>, <0x120 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		/* GPIOs 128 .. 159 */
> +		gpio4: gpio@110 {
> +			compatible = "brcm,bcm6345-gpio";
> +			reg = <0x110 0x04>, <0x124 0x04>;
> +			reg-names = "dirout", "dat";
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		rng@300 {
> +			compatible = "brcm,iproc-rng200";
> +			reg = <0x300 0x28>;
> +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
>  		uart0: serial@600 {
>  			compatible = "brcm,bcm6345-uart";
>  			reg = <0x600 0x20>;
> @@ -108,6 +164,14 @@ uart0: serial@600 {
>  			status = "disabled";
>  		};
>
> +		leds: led-controller@700 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "brcm,bcm63138-leds";
> +			reg = <0x700 0xdc>;
> +			status = "disabled";
> +		};
> +
>  		hsspi: spi@1000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>
> --
> 2.49.0

Reviewed-by: William Zhang <william.zhang@broadcom.com>

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