Re: [PATCH v2 1/2] amdgpu: Add profiler IOCTL interface for performance monitoring

[James Zhu <jamesz@amd.com>]

drop this version.

Thanks!

On 2026-05-15 13:13, James Zhu wrote:
> This patch introduces the foundational profiler infrastructure for AMD GPUs,
> enabling userspace access to performance monitoring capabilities including:
> - Performance Monitoring Counters (PMC)
> - Performance Counter Sampling (PC Sampling)
> - Streaming Performance Monitor (SPM)
>
> The implementation includes:
> - New DRM_AMDGPU_PROFILER IOCTL interface with version query support
> - amdgpu_profiler_version() wrapper function for userspace
> - Profiler operation enumeration and argument structures in the kernel API
> - Build system integration for the new profiler module
>
> The version query operation allows userspace to determine profiler capability
> and compatibility before attempting to use advanced profiling features. Future
> patches will extend this with additional profiler operations (acquire, release,
> configure sampling buffers, etc.).
>
> This foundation enables profiling tools and performance analysis frameworks to
> access GPU performance data directly from userspace, supporting performance
> debugging and optimization workflows.
>
> Signed-off-by: James Zhu <James.Zhu@amd.com>
> ---
>   amdgpu/amdgpu.h          |  9 ++++++++
>   amdgpu/amdgpu_profiler.c | 46 ++++++++++++++++++++++++++++++++++++++++
>   amdgpu/meson.build       |  2 +-
>   include/drm/amdgpu_drm.h | 19 +++++++++++++++++
>   4 files changed, 75 insertions(+), 1 deletion(-)
>   create mode 100644 amdgpu/amdgpu_profiler.c
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 53144f59..4ec1f6b6 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -2120,6 +2120,15 @@ int amdgpu_userq_wait(amdgpu_device_handle dev,
>   int amdgpu_cwsr_set_l2_trap_handler(amdgpu_device_handle dev,
>   				    uint64_t tba_addr, uint64_t tba_size,
>   				    uint64_t tma_addr, uint64_t tma_size);
> +
> +/**
> + * Acquire profiler version
> + * \param   dev               - \c [in]     device handle
> + *
> + * \return  0 on success otherwise POSIX Error code
> + */
> +int amdgpu_profiler_version(amdgpu_device_handle dev);
> +
>   #ifdef __cplusplus
>   }
>   #endif
> diff --git a/amdgpu/amdgpu_profiler.c b/amdgpu/amdgpu_profiler.c
> new file mode 100644
> index 00000000..8d4dffe4
> --- /dev/null
> +++ b/amdgpu/amdgpu_profiler.c
> @@ -0,0 +1,46 @@
> +/*
> + * Copyright 2026 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#include <string.h>
> +#include <errno.h>
> +#include "xf86drm.h"
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +drm_public int
> +amdgpu_profiler_version(amdgpu_device_handle dev)
> +{
> +	int ret;
> +	struct drm_amdgpu_profiler_args user_arg;
> +
> +	if (!dev)
> +		return -EINVAL;
> +
> +	memset(&user_arg, 0, sizeof(user_arg));
> +	user_arg.op = AMDGPU_PROFILER_VERSION;
> +
> +	ret = drmCommandWriteRead(dev->fd, DRM_AMDGPU_PROFILER,
> +				  &user_arg, sizeof(user_arg));
> +
> +	return ret;
> +}
> diff --git a/amdgpu/meson.build b/amdgpu/meson.build
> index 3962d32c..d781f2e9 100644
> --- a/amdgpu/meson.build
> +++ b/amdgpu/meson.build
> @@ -27,7 +27,7 @@ libdrm_amdgpu = library(
>       files(
>         'amdgpu_asic_id.c', 'amdgpu_bo.c', 'amdgpu_cs.c', 'amdgpu_device.c',
>         'amdgpu_gpu_info.c', 'amdgpu_vamgr.c', 'amdgpu_vm.c', 'handle_table.c',
> -      'amdgpu_userq.c',
> +      'amdgpu_userq.c', 'amdgpu_profiler.c',
>       ),
>       config_file,
>     ],
> diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
> index ef12e725..307242ac 100644
> --- a/include/drm/amdgpu_drm.h
> +++ b/include/drm/amdgpu_drm.h
> @@ -58,6 +58,7 @@ extern "C" {
>   #define DRM_AMDGPU_USERQ_SIGNAL		0x17
>   #define DRM_AMDGPU_USERQ_WAIT		0x18
>   #define DRM_AMDGPU_CWSR			0x20
> +#define DRM_AMDGPU_PROFILER			0x21
>   
>   #define DRM_IOCTL_AMDGPU_GEM_CREATE	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
>   #define DRM_IOCTL_AMDGPU_GEM_MMAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
> @@ -79,6 +80,7 @@ extern "C" {
>   #define DRM_IOCTL_AMDGPU_USERQ_SIGNAL	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)
>   #define DRM_IOCTL_AMDGPU_USERQ_WAIT	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)
>   #define DRM_IOCTL_AMDGPU_CWSR		DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_CWSR, union drm_amdgpu_cwsr)
> +#define DRM_IOCTL_AMDGPU_PROFILER	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_PROFILER, struct drm_amdgpu_profiler_args)
>   
>   /**
>    * DOC: memory domains
> @@ -1695,6 +1697,23 @@ struct drm_amdgpu_info_gpuvm_fault {
>   #define AMDGPU_FAMILY_GC_11_5_0			150 /* GC 11.5.0 */
>   #define AMDGPU_FAMILY_GC_12_0_0			152 /* GC 12.0.0 */
>   
> +/*
> + * Supported Profiler Operations
> + */
> +enum drm_amdgpu_profiler_ops {
> +	AMDGPU_PROFILER_VERSION = 0,
> +};
> +
> +struct drm_amdgpu_profiler_args {
> +	__u32 op;                        /* amdgpu_profiler_op */
> +	union {
> +	    __u32 version;               /* AMDGPU_PROFILER_VERSION_NUM
> +	                                  * lower 16 bit: minor
> +	                                  * higher 16 bit: major
> +	                                  */
> +	};
> +};
> +
>   #if defined(__cplusplus)
>   }
>   #endif