Re: [PATCH] x86/suspend: unconditionally raise a timer softirq on resume

[Jan Beulich <jbeulich@suse.com>]

On 25.08.2025 17:15, Roger Pau Monne wrote:
> The current code to restore the timer state on resume is incomplete.  While
> the local APIC Initial Count Register is saved and restored across
> suspension (even if possibly no longer accurate since it's not adjusted to
> account for the time spent in suspension), the TSC deadline MSR is not
> saved and restored, hence hosts using the TSC deadline timer will likely
> get stuck when resuming from suspension.
> 
> The lack of restoring of the TSC deadline MSR was mitigated by the raising
> of a timer softirq in mwait_idle_with_hints() if the timer had expired,
> previous to commit 3faf0866a33070b926ab78e6298290403f85e76c, which removed
> that logic.
> 
> This patch fixes the usage of the TSC deadline timer with suspension, by
> unconditionally raising a timer softirq on resume, that will take care of
> rearming the hardware timer.  Given that a timer softirq will be
> unconditionally risen, there's no need to save and restore the APIC Initial
> Count Register anymore either.
> 
> Note that secondary processors don't need this special treatment when
> resuming, since they are offlined before suspension and brought back up
> during resume, the first timer that gets setup will trigger a timer softirq
> unconditionally, for example from sched_migrate_timers() that gets called
> for each secondary processor.
> 
> Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
> Fixes: fd1291a826e1 ('X86: Prefer TSC-deadline timer in Xen')
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>